EPC16QC100SS vs EPC16QC-100T Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC16QC100SS sa pamamagitan ng Intel at EPC16QC-100T sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Intel
EPC16QC100SS EPC16QC100SS - 16Mb Config PROM for FPGAs, PQFP-100 | Intel

EPC16QC100SS - 16Mb Config PROM for FPGAs, PQFP-100 | Intel

EPC16QC100SS ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EPC16QC100SS EPC16QC-100T
Brand Intel Altera
Kategorya Memory ICs Memory ICs
Katayuan ng Lifecycle Huling Pagbili Obsolete
Uri ng Memory In-System Programmable Configuration PROM Flash Configuration PROM (in-system programmable)
Laki ng Memory 16 Mb (16,777,216 bits) —
Configuration Interface Passive Serial / Passive Parallel Synchronous / Passive Parallel Asynchronous —
Operating Modes FPGA configuration storage, ISP via IEEE 1532 —
Supply Voltage (VCC) 3.3 V (SS suffix variant) —
I/O Logic Level 3.3V or 2.5V selectable via VCCSEL —
Temperature na Operasyon 0C to +70C (Commercial) [DATA_NEEDED: Operating temperature range]
Packhaging 100-pin PQFP (Plastic Quad Flat Pack), 20x14 mm 100-pin PQFP (20 x 14 mm), 0.65 mm pitch
Uri ng Pagpapasok Surface Mount Surface Mount
Compatible FPGAs Stratix, Stratix II, Cyclone, Cyclone II, APEX 20K, other Altera FPGAs requiring >8 Mbit configuration —
Programmability In-system programmable (IEEE 1532) —
Level ng MSL [DATA_NEEDED: MSL level] [DATA_NEEDED: Moisture sensitivity level]
Tindminan RoHS [DATA_NEEDED: RoHS status] unknown
Lead-Free [DATA_NEEDED: lead-free status] unknown
Manufacturer Intel (formerly Altera) —
Memory Density — 16 Mbit (2 Mbyte)
Supported FPGA Families — Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K
Configuration Data Width — 8-bit or 16-bit (cascaded dual-device mode)
Configuration Modes — Serial (single device), Parallel (two cascaded devices)
Data Compression Support — Yes (35% to 55% bitstream reduction typical)
JTAG / Boundary Scan — IEEE 1149.1 compliant, in-system programmable
Volte ng Pagbibigay — 3.3 V
Cascade Interface — nCE / nOE handshake for multi-device chains
Programming Interface — JTAG (IEEE 1149.1) and serial
Endurance — [DATA_NEEDED: Program/erase cycle rating]
Data Retention — [DATA_NEEDED: Data retention specification]

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