EPC2-TI32N vs EPC2-TC32 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2-TI32N sa pamamagitan ng Intel at EPC2-TC32 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2-TI32N | EPC2-TC32 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Laki ng Memory | 1.6 Mb | 1.6 Mbit |
| Memory Organization | 1,695,680 x 1 | — |
| Programmable Type | In System Programmable | — |
| Uri ng Interface | Serial (for SRAM-based LUT FPGAs) | Serial |
| Programming Interface | IEEE 1532-compliant JTAG | — |
| Supply Voltage - VCCINT | 3.0 V to 3.6 V | — |
| Supply Voltage - VCCIO | 4.5 V to 5.5 V | — |
| Temperature na Operasyon | -40 C to +85 C | — |
| Packhaging / Kaso | 32-TQFP (7 mm x 7 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Terminal Pitch | 0.8 mm | — |
| Supplier Device Package | 32-TQFP | — |
| Packaging | Tray | — |
| Technology | Flash + CMOS configuration logic | — |
| Configuration Clock | Dedicated DCLK output for FPGA | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status - datasheet does not specify in retrieved snippet] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Uri ng Memory | — | EPROM (OTP/UV-erasable configuration PROM) |
| Organisasyon | — | Serial bitstream output |
| Programmability | — | In-System Programmable (ISP) via JTAG (IEEE 1149.1) |
| Volte ng Pagbibigay | — | 3.3 V |
| Hanay ng Temperature na Operasyon | — | 0C to +70C (Commercial) |
| Packhaging | — | 32-pin TQFP (7x7 mm) |
| Supported FPGA Families | — | Stratix I/II, Cyclone I/II, APEX 20K/II, Mercury, ACEX 1K, FLEX 10K |
| Configuration Mode | — | Serial (FPP/MSD via FPGA master/slave) |
| Output Control | — | OE and nCS gating internal tri-state buffer |
| Internal Oscillator | — | Yes (drives address counter) |
| Level ng MSL | — | MSL 3 (168 hours) |