EPC22C20N vs EPC2CC20N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC22C20N sa pamamagitan ng Altera at EPC2CC20N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC22C20N | EPC2CC20N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | Configuration PROM for SRAM-based LUT FPGAs | — |
| Target FPGA Family | FLEX 10K, FLEX 6000, APEX 20K series | — |
| Configuration Interface | Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) | 16-bit parallel (FPP) / Passive Serial (PS) |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster |
| Volte ng Pagbibigay | 3.3 V or 5 V | — |
| Packhaging | 20-pin PLCC (J-lead) | PLCC-20 |
| Package Marking Code | EPC22C20N | — |
| Bilang ng Pin | 20 | — |
| Uri ng Pagpapasok | Surface Mount / Socket | Surface Mount (PLCC-20 socket compatible) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: industrial/commercial temp range] |
| Bitstream Capacity | [DATA_NEEDED: bitstream capacity in bits] | — |
| Configuration Time | [DATA_NEEDED: typical configuration time] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Katayuan ng Lifecycle | Obsolete (last-time-buy from Altera announced for legacy configuration devices) | — |
| Fungsi | — | Configuration device for SRAM-based LUT FPGAs |
| Density | — | [DATA_NEEDED: bitstream density in bits] |
| Supply Voltage (VCC) | — | 3.3 V |
| In-System Programmable | — | Yes |
| Error Detection | — | 16-bit CRC on configuration frames |
| Configuration Modes Supported | — | FPP and PS (depends on host FPGA) |
| Cascadable | — | Yes (multiple EPC2 devices for larger bitstreams) |
| Open-Drain Status Pin | — | Yes (CONF_DONE / nSTATUS compatible) |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |