EPC22C20N vs EPC2CC20N 对比

详细并排对比 EPC22C20N 出自 Altera 和 EPC2CC20N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC22C20N EPC2CC20N
品牌 Altera Altera
分类 Memory ICs FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $11.40 $10.85
Manufacturer Intel (formerly Altera) —
Device Type Configuration PROM for SRAM-based LUT FPGAs —
Target FPGA Family FLEX 10K, FLEX 6000, APEX 20K series —
Configuration Interface Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) 16-bit parallel (FPP) / Passive Serial (PS)
Programming Interface IEEE 1149.1 JTAG (in-system programmable) JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster
电源电压 3.3 V or 5 V —
封装 20-pin PLCC (J-lead) PLCC-20
Package Marking Code EPC22C20N —
引脚数量 20 —
安装类型 Surface Mount / Socket Surface Mount (PLCC-20 socket compatible)
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: industrial/commercial temp range]
Bitstream Capacity [DATA_NEEDED: bitstream capacity in bits] —
Configuration Time [DATA_NEEDED: typical configuration time] —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Lead-Free Status [DATA_NEEDED: lead-free status] —
生命周期状态 Obsolete (last-time-buy from Altera announced for legacy configuration devices) —
功能 — Configuration device for SRAM-based LUT FPGAs
Density — [DATA_NEEDED: bitstream density in bits]
Supply Voltage (VCC) — 3.3 V
In-System Programmable — Yes
Error Detection — 16-bit CRC on configuration frames
Configuration Modes Supported — FPP and PS (depends on host FPGA)
Cascadable — Yes (multiple EPC2 devices for larger bitstreams)
Open-Drain Status Pin — Yes (CONF_DONE / nSTATUS compatible)
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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