EPC2LC20EM vs EPC2L20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2LC20EM sa pamamagitan ng Intel at EPC2L20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2LC20EM | EPC2L20 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | Memory ICs |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Uri ng Memory | Serial Configuration Memory (EPC2 family) | Configuration PROM (non-volatile) |
| Density | 1.6 Mbit | — |
| Interface | Serial / Parallel configuration, JTAG ISP | Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) |
| Operating Voltage (Core) | 3.3 V | — |
| Programming Mode | In-system programmable via JTAG (IEEE 1149.1) | — |
| Package Type | PLCC-20 (plastic) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Tindminan RoHS | [DATA_NEEDED: lead-free / RoHS classification] | RoHS Compliant (per IC Components listing) |
| Configuration Compatibility | Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy | — |
| Data Retention | [DATA_NEEDED: minimum data-retention years] | — |
| Program/Erase Cycles | [DATA_NEEDED: minimum endurance cycles] | — |
| Access Time | [DATA_NEEDED: tOE / tAA in ns] | — |
| Uri ng Pagpapasok | Surface Mount (PLCC socket or solder) | Surface Mount (PLCC socket compatible) |
| Level ng MSL | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL rating] |
| Manufacturer Family | EPC2 Enhanced Configuration Device | — |
| Laki ng Memory | — | 1.6 Mbit |
| Organisasyon | — | 8-bit byte |
| Programmability | — | In-system programmable via JTAG |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5.0 V (VCCSEL selectable) |
| Cascade Support | — | Yes - multi-device daisy chain |
| Boundary Scan | — | JTAG IEEE 1149.1 BST |
| Packhaging | — | 20-pin PLCC (J-lead) |
| Process Technology | — | Low-power CMOS |
| Target FPGAs | — | APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix |