EPC2LC20EM vs EPC2L20 比較

詳細並排比較 EPC2LC20EM 由 Intel 與 EPC2L20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2LC20EM EPC2L20
品牌 Intel Altera
類別 FPGA & CPLD Memory ICs
生命週期狀態 啟用中 Obsolete
記憶體類型 Serial Configuration Memory (EPC2 family) Configuration PROM (non-volatile)
Density 1.6 Mbit —
介面 Serial / Parallel configuration, JTAG ISP Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532)
Operating Voltage (Core) 3.3 V —
Programming Mode In-system programmable via JTAG (IEEE 1149.1) —
Package Type PLCC-20 (plastic) —
工作溫度 -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
RoHS 狀態 [DATA_NEEDED: lead-free / RoHS classification] RoHS Compliant (per IC Components listing)
Configuration Compatibility Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy —
Data Retention [DATA_NEEDED: minimum data-retention years] —
Program/Erase Cycles [DATA_NEEDED: minimum endurance cycles] —
Access Time [DATA_NEEDED: tOE / tAA in ns] —
安裝類型 Surface Mount (PLCC socket or solder) Surface Mount (PLCC socket compatible)
MSL 等級 [DATA_NEEDED: moisture sensitivity level] [DATA_NEEDED: MSL rating]
Manufacturer Family EPC2 Enhanced Configuration Device —
記憶體容量 — 1.6 Mbit
組織 — 8-bit byte
Programmability — In-system programmable via JTAG
Core Supply Voltage (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 3.3 V or 5.0 V (VCCSEL selectable)
Cascade Support — Yes - multi-device daisy chain
Boundary Scan — JTAG IEEE 1149.1 BST
封裝 — 20-pin PLCC (J-lead)
Process Technology — Low-power CMOS
Target FPGAs — APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix

資料表與資源

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