EPC2LI20 vs EPC2L20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2LI20 sa pamamagitan ng Altera at EPC2L20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2LI20 | EPC2L20 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Laki ng Memory | 1.6 Mb (1,572,864 bits) | 1.6 Mbit |
| Uri ng Memory | Flash (in-system programmable) | Configuration PROM (non-volatile) |
| Programmable Type | In System Programmable (ISP) | — |
| Fungsi | Configuration PROM for SRAM-based FPGAs | — |
| Supply Voltage - Operating | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) | — |
| Temperature na Operasyon | -40 C to +85 C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Packhaging / Kaso | 20-PLCC (J-lead, 9x9 mm) | — |
| Uri ng Pagpapasok | Surface Mount (PLCC socket-compatible) | Surface Mount (PLCC socket compatible) |
| Configuration Interface | Serial or Byte-wide (parallel) | — |
| Decompression | On-chip (supports compressed bitstreams) | — |
| JTAG / ISP Interface | IEEE 1532 (TCK, TMS, TDI, TDO) | — |
| Multi-Device Support | Yes (daisy-chain configuration) | — |
| User-Accessible Memory | Yes (unused flash available to user logic) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | RoHS Compliant (per IC Components listing) |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Organisasyon | — | 8-bit byte |
| Interface | — | Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) |
| Programmability | — | In-system programmable via JTAG |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5.0 V (VCCSEL selectable) |
| Cascade Support | — | Yes - multi-device daisy chain |
| Boundary Scan | — | JTAG IEEE 1149.1 BST |
| Packhaging | — | 20-pin PLCC (J-lead) |
| Process Technology | — | Low-power CMOS |
| Target FPGAs | — | APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix |