EPC2LI20N vs EPC2L20N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC2LI20N sa pamamagitan ng Altera at EPC2L20N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC2LI20N EPC2L20N
Brand Altera Altera
Kategorya Memory ICs Memory ICs
Katayuan ng Lifecycle Obsolete NRND
Uri ng Memory Non-volatile configuration PROM (Flash) —
Laki ng Memory 1.6 Mbit 1.6 Mbit
Programmable Type In System Programmable (ISP via JTAG) In System Programmable (ISP)
Configuration Mode Serial —
Maximum Configuration Frequency 10 MHz —
Supply Voltage (VCCINT) 3.0 V to 3.6 V —
Supply Voltage (VCCIO) 4.5 V to 5.5 V —
Packhaging / Kaso 20-PLCC (J-Lead), 9x9 mm 20-LCC (J-Lead), PLCC-20
Uri ng Pagpapasok Surface Mount Surface Mount (J-Lead PLCC)
Packaging Tube Tube
Temperature na Operasyon [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
Supported FPGA Series ACEX 1K, APEX II, Cyclone, Stratix II —
JTAG Interface IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) —
Configuration Pins nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE —
Tindminan RoHS [DATA_NEEDED: RoHS status] Compliant
Fungsi — In-System Programmable Configuration PROM for SRAM-based LUT FPGAs
Supply Voltage - VCCINT/VCCIO — 3.0 V to 3.6 V or 4.5 V to 5.5 V
Supported FPGA Families — Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet)
Configuration Interface — Serial (Altera FPP / PS configuration scheme)
Cascade Support — Yes (multi-PROM chain via CE control)
Programming Method — In-system via 4-wire ISP / JTAG-style
Bilang ng Pin — 20
Lead Finish — Matte Tin (Pb-free)
Level ng MSL — 3 (168 hours)

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