EPC2LI20PULLS vs EPC2LI20 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC2LI20PULLS sa pamamagitan ng Intel at EPC2LI20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC2LI20PULLS EPC2LI20
Brand Intel Altera
Kategorya Memory ICs Memory ICs
Katayuan ng Lifecycle Obsolete NRND
Uri ng Memory Serial Configuration Flash PROM Flash (in-system programmable)
Laki ng Memory 1.6 Mbit 1.6 Mb (1,572,864 bits)
Configuration Interface Serial (Altera FPP / PS modes) Serial or Byte-wide (parallel)
Maksimum na Taktiko ng Oras 10 MHz —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
I/O Tolerance 5 V tolerant configuration pins —
Programmability In-system via IEEE 1149.1 JTAG —
Compression Support Yes (real-time decompression in target FPGA) —
Multi-Device Cascade Yes (daisy-chain supported) —
Temperature na Operasyon -40C to +85C (industrial) -40 C to +85 C (Industrial)
Packhaging 20-pin PLCC (J-Lead, 9x9 mm) —
Uri ng Pagpapasok Surface Mount / Socket Surface Mount (PLCC socket-compatible)
Level ng MSL 3 (168 hours) [DATA_NEEDED: MSL level]
Tindminan RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free finish] —
Compatible FPGA Families Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur —
Programmable Type — In System Programmable (ISP)
Fungsi — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
Packhaging / Kaso — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

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