EPC2LI20PULLS vs EPC2LI20 比較

詳細並排比較 EPC2LI20PULLS 由 Intel 與 EPC2LI20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2LI20PULLS EPC2LI20
品牌 Intel Altera
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete NRND
記憶體類型 Serial Configuration Flash PROM Flash (in-system programmable)
記憶體容量 1.6 Mbit 1.6 Mb (1,572,864 bits)
Configuration Interface Serial (Altera FPP / PS modes) Serial or Byte-wide (parallel)
最大時脈頻率 10 MHz —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
I/O Tolerance 5 V tolerant configuration pins —
Programmability In-system via IEEE 1149.1 JTAG —
Compression Support Yes (real-time decompression in target FPGA) —
Multi-Device Cascade Yes (daisy-chain supported) —
工作溫度 -40C to +85C (industrial) -40 C to +85 C (Industrial)
封裝 20-pin PLCC (J-Lead, 9x9 mm) —
安裝類型 Surface Mount / Socket Surface Mount (PLCC socket-compatible)
MSL 等級 3 (168 hours) [DATA_NEEDED: MSL level]
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free finish] —
Compatible FPGA Families Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur —
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封裝 / 外殼 — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

資料表與資源

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