EPF10K30ETC144-3N vs EPF10K30ETI144-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K30ETC144-3N sa pamamagitan ng Intel at EPF10K30ETI144-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF10K30ETC144-3N | EPF10K30ETI144-3 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | FLEX 10KE | FLEX-10KE Embedded Programmable Logic Device |
| Logic Family | CMOS | — |
| Typical Gates | 30,000 | — |
| Logic Elements / Cells | 1,728 | — |
| Logic Array Blocks (LABs) | 216 | 216 |
| Embedded Memory Bits | 24,576 | — |
| User I/Os | 102 | — |
| Bilang ng Pins | 144 | — |
| Package Type | TQFP-144 (22 × 22 mm, 0.5 mm pitch) | — |
| Package Code | LFQFP | — |
| Terminal Form | Gull Wing | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (Gull Wing) |
| Technology | 0.22 µm CMOS, SRAM-based | — |
| Core Supply Voltage (VCCINT) | 2.5 V | — |
| Temperature na Operasyon | 0 °C to 70 °C (Commercial) | -40C to +85C (Industrial) |
| Propagation Delay | 0.6 ns (typical) | — |
| Internal Frequency | [DATA_NEEDED: internal frequency max] | — |
| Programming Method | JTAG (IEEE 1149.1), in-system SRAM configuration | — |
| Configuration Memory | Volatile SRAM (requires external configuration device) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-Compliant (Sn/Pb lead finish) |
| Series | — | FLEX-10KE |
| Logic Elements | — | 1728 |
| Embedded RAM | — | 24,576 bits |
| Embedded Array Blocks (EABs) | — | 6 |
| Maximum User I/O | — | 102 |
| Maximum Equivalent Gates | — | 119,000 |
| Pin-to-Pin Delay (Speed Grade) | — | 12.5 ns |
| Supply Voltage (Core) | — | 2.5 V / 3.3 V |
| I/O Voltage Tolerance | — | 5.0 V / 3.3 V / 2.5 V (multi-volt) |
| Packhaging | — | 144-LQFP (LFQFP) |
| Package Height | — | 1.6 mm |
| Lead Finish | — | Tin/Lead (Sn/Pb) |
| Configuration Method | — | SRAM (volatile) + JTAG IEEE 1149.1 |