EPM240GT100C5N vs EPM240T100C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GT100C5N sa pamamagitan ng Altera at EPM240T100C3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240GT100C5N | EPM240T100C3N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Series | EPM240 | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | 192 |
| User I/Os | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Core Supply Voltage (VCCINT) | 2.5 V or 3.3 V | 3.0 V to 3.6 V |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 °C to +85 °C (commercial) |
| Packhaging | 100-pin TQFP (T100) | 100-pin TQFP (14x14 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmable Type | In-System Programmable (ISP) via JTAG | — |
| Configuration Memory | Non-volatile Flash (instant-on) | Internal Flash (non-volatile) |
| Level ng MSL | 3 | [DATA_NEEDED: MSL rating] |
| Tindminan RoHS | Compliant | Compliant |
| Device Family | — | MAX II CPLD (EPM240) |
| Logic Elements (LE) | — | 240 |
| User I/O Pins | — | 80 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.4 ns (typical) |
| Maximum Operating Frequency | — | 200 MHz (internal oscillator) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Quiescent Current (typical) | — | 35 mA |