EPM240GT100C5N vs EPM240T100C3N 比較

詳細並排比較 EPM240GT100C5N 由 Altera 與 EPM240T100C3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM240GT100C5N EPM240T100C3N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family MAX II —
Series EPM240 MAX II
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements (LEs) 240 —
Macrocells 192 192
User I/Os 80 —
Pin-to-Pin Delay (tPD) 4.7 ns —
User Flash Memory (UFM) 8 Kbits 8 Kbits
Core Supply Voltage (VCCINT) 2.5 V or 3.3 V 3.0 V to 3.6 V
I/O Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V 1.5 V / 1.8 V / 2.5 V / 3.3 V
工作溫度 0C to +85C (Commercial) 0 °C to +85 °C (commercial)
封裝 100-pin TQFP (T100) 100-pin TQFP (14x14 mm)
安裝類型 Surface Mount Surface Mount
Programmable Type In-System Programmable (ISP) via JTAG —
Configuration Memory Non-volatile Flash (instant-on) Internal Flash (non-volatile)
MSL 等級 3 [DATA_NEEDED: MSL rating]
RoHS 狀態 Compliant Compliant
Device Family — MAX II CPLD (EPM240)
Logic Elements (LE) — 240
User I/O Pins — 80
Pin-to-Pin Logic Delay (tPD) — 4.4 ns (typical)
Maximum Operating Frequency — 200 MHz (internal oscillator)
Programming Interface — JTAG (IEEE 1149.1) / ISP
Quiescent Current (typical) — 35 mA

資料表與資源

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