EPM3128ATC144-7 vs EPM3128ATC144-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC144-7 sa pamamagitan ng Intel at EPM3128ATC144-7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3128ATC144-7N - MAX 3000A CPLD, 128 Macrocells, 7.5ns | Altera
EPM3128ATC144-7N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM3128ATC144-7 | EPM3128ATC144-7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Presyo ng Yunit (USD) | — | $9.25 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | — |
| User I/Os | 96 | 96 |
| Packhaging | TQFP-144 (22x22 mm) | TQFP-144 (20 x 20 mm, 0.5 mm pitch) |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (multiVolt) | — |
| Speed Grade | -7 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fCNT) | 129.9 MHz | — |
| Programming Technology | CMOS EEPROM (in-system programmable) | — |
| JTAG Support | IEEE 1149.1 boundary-scan + ISP | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0 °C to +70 °C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (SMD/SMT) |
| Process Technology | CMOS EEPROM | — |
| Series | — | MAX 3000A |
| Architecture | — | EEPROM-based, MAX architecture |
| Number of Macrocells | — | 128 |
| Number of Usable Gates | — | Up to 10,000 |
| Bilang ng Pin | — | 144 |
| Logic Family | — | CMOS |
| Propagation Delay (tPD) | — | 7.5 ns (pin-to-pin, -7 speed grade) |
| Counter Frequency | — | Up to 227.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| In-System Programmability (ISP) | — | Yes, via JTAG (IEEE 1149.1) |
| PCI Compliance | — | Compatible with PCI Local Bus Specification Rev. 2.2 |
| Tindminan RoHS | — | Lead-free (-7N suffix indicates Pb-free finish) |