EPM5016DC-17 vs EPM5016DC-20 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5016DC-17 sa pamamagitan ng Altera at EPM5016DC-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5016DC-17 EPM5016DC-20
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 5000 MAX 5000
Macrocells 16 16
Logic Elements [DATA_NEEDED: LE count for MAX 5000 family] —
User I/O Pins (max) 24 —
Propagation Delay (tPD) 17 ns 20 ns
Counter Frequency (fCNT) 67 MHz —
Supply Voltage (VCC) 5 V —
I/O Standard TTL-compatible —
Process Technology 0.75 micron CMOS EEPROM CMOS, UV-erasable
Packhaging Ceramic DIP-24 (DC suffix) —
Bilang ng Pin 24 —
Uri ng Pagpapasok Through-hole —
Temperature na Operasyon 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
In-System Programmability Yes (ByteBlaster / BitBlaster) —
Configuration Memory On-chip EEPROM (non-volatile) —
Tindminan RoHS [DATA_NEEDED: confirmed compliance status from manufacturer] [DATA_NEEDED: RoHS compliance]
Device Type — EPLD (UV-Erasable Programmable Logic Device)
Product Terms — 160
Dedicated Inputs — 7
I/O Pins — 8
Maksimum na Taktiko ng Oras — 62.5 MHz
Maximum Supply Voltage — 5.25 V
Nominal Supply Voltage — 5.0 V
Architecture — PAL-type macrocell with Programmable Interconnect Array (PIA)
Package Type — 20-pin Ceramic DIP (Cerdip) with UV window
Package Suffix Code — DC = Ceramic DIP, Commercial
Speed Grade — -20 = 20 ns tPD
Programming Method — UV erase + EPROM-style programming via Altera programming hardware

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