EPM5032DI25 vs EPM5032DM883B Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032DI25 sa pamamagitan ng Altera at EPM5032DM883B sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5032DI25 | EPM5032DM883B |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 (Classic EPLD) |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | — |
| Product Terms | 320 | — |
| Output Macrocells | 16 | — |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (nominal, TTL-compatible I/O) |
| I/O Standard | TTL-compatible | — |
| Packhaging | 24-pin Ceramic DIP (DI) with quartz window | — |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| Logic Elements | — | 32 macrocells (MAX architecture) |
| Technology | — | UV-erasable EPROM cell |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD in ns] |
| Maximum Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT in MHz] |
| Temperature na Operasyon | — | MILITARY (per /883B screen) |
| MIL-STD-883 Screening | — | Class B (DM/883B) |
| Package Type | — | WDIP-28 (ceramic DIP with quartz window) |
| Bilang ng Pin | — | 28 |
| Uri ng Pagpapasok | — | Through-Hole |
| Terminal Form | — | Through-Hole |
| Package Shape | — | RECTANGULAR |
| Programming Method | — | Programmer + UV erase |
| Tindminan RoHS | — | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] |