EPM5032DI25 vs EPM5032DM883B 比較
詳細並排比較 EPM5032DI25 由 Altera 與 EPM5032DM883B 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5032DI25 | EPM5032DM883B |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 (Classic EPLD) |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | — |
| Product Terms | 320 | — |
| Output Macrocells | 16 | — |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (nominal, TTL-compatible I/O) |
| I/O Standard | TTL-compatible | — |
| 封裝 | 24-pin Ceramic DIP (DI) with quartz window | — |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| Logic Elements | — | 32 macrocells (MAX architecture) |
| Technology | — | UV-erasable EPROM cell |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD in ns] |
| Maximum Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT in MHz] |
| 工作溫度 | — | MILITARY (per /883B screen) |
| MIL-STD-883 Screening | — | Class B (DM/883B) |
| Package Type | — | WDIP-28 (ceramic DIP with quartz window) |
| 腳位數 | — | 28 |
| 安裝類型 | — | Through-Hole |
| Terminal Form | — | Through-Hole |
| Package Shape | — | RECTANGULAR |
| Programming Method | — | Programmer + UV erase |
| RoHS 狀態 | — | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] |