EPM5130JI vs EPM5128JI Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5130JI sa pamamagitan ng Altera at EPM5128JI sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5130JI EPM5128JI
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 5000 —
Device Type UV-Erasable EPLD (CMOS EPROM) UV-erasable programmable logic device (PLD)
Macrocells 128 128
Logic Array Blocks (LABs) 8 —
Maksimum na Taktiko ng Oras 33.3 MHz —
Propagation Delay (tPD) 55 ns 55 ns (typical)
External Clock Inputs 1 (shared input/clock) —
Interconnect Programmable Interconnect Array (PIA) —
Process Technology 0.75 micron CMOS EPROM CMOS
Volte ng Pagbibigay 5 V (typical) [DATA_NEEDED: VCC range]
Input Logic Standard TTL-compatible —
Package Type Ceramic J-Leaded Chip Carrier (JLCC) with UV window —
Temperature na Operasyon Commercial (0C to +70C) —
Program/Erase Method UV erasure through quartz window —
Tindminan RoHS Non-compliant (contains Pb in ceramic package) Non-compliant (ceramic hermetic package)
Lifecycle Obsolete - EOL by Altera/Intel —
Device Family — MAX 5000
Maximum Internal Frequency — 40 MHz
Programmable Technology — UV-erasable EPROM cell
Packhaging — 68-terminal ceramic CQCC, windowed, J-leads
Operating Temperature Grade — Industrial ("I" suffix)
Programming — Altera MAX+plus II compatible programmer + UV eraser
Lead Finish — Tin-lead (SnPb) over nickel
Uri ng Pagpapasok — Surface Mount (J-lead CQCC)
Logic Blocks — [DATA_NEEDED: number of LABs / logic array blocks]
User I/O Pins — [DATA_NEEDED: pin count of user I/Os]
Standby Current — [DATA_NEEDED: ICCSB]

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