EPM5130JI vs EPM5128JI 比較
詳細並排比較 EPM5130JI 由 Altera 與 EPM5128JI 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5130JI | EPM5128JI |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | UV-Erasable EPLD (CMOS EPROM) | UV-erasable programmable logic device (PLD) |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| 最大時脈頻率 | 33.3 MHz | — |
| Propagation Delay (tPD) | 55 ns | 55 ns (typical) |
| External Clock Inputs | 1 (shared input/clock) | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Process Technology | 0.75 micron CMOS EPROM | CMOS |
| 供應電壓 | 5 V (typical) | [DATA_NEEDED: VCC range] |
| Input Logic Standard | TTL-compatible | — |
| Package Type | Ceramic J-Leaded Chip Carrier (JLCC) with UV window | — |
| 工作溫度 | Commercial (0C to +70C) | — |
| Program/Erase Method | UV erasure through quartz window | — |
| RoHS 狀態 | Non-compliant (contains Pb in ceramic package) | Non-compliant (ceramic hermetic package) |
| Lifecycle | Obsolete - EOL by Altera/Intel | — |
| Device Family | — | MAX 5000 |
| Maximum Internal Frequency | — | 40 MHz |
| Programmable Technology | — | UV-erasable EPROM cell |
| 封裝 | — | 68-terminal ceramic CQCC, windowed, J-leads |
| Operating Temperature Grade | — | Industrial ("I" suffix) |
| Programming | — | Altera MAX+plus II compatible programmer + UV eraser |
| Lead Finish | — | Tin-lead (SnPb) over nickel |
| 安裝類型 | — | Surface Mount (J-lead CQCC) |
| Logic Blocks | — | [DATA_NEEDED: number of LABs / logic array blocks] |
| User I/O Pins | — | [DATA_NEEDED: pin count of user I/Os] |
| Standby Current | — | [DATA_NEEDED: ICCSB] |