EPM5130WM883B-1 vs EPM5130GM883B Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5130WM883B-1 sa pamamagitan ng Altera at EPM5130GM883B sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM5130WM883B-1 - 128-Macrocell UV PLD, 5V, CQFP-100 | Altera MAX 5000
EPM5130WM883B-1 ObsoleteAltera
EPM5130GM883B - Military CPLD, MAX 5000, 100-pin CPGA | Altera
EPM5130GM883B ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM5130WM883B-1 | EPM5130GM883B |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Device Family | MAX 5000 (Classic EPLD) | — |
| Manufacturer | Altera (now Intel PSG) | Altera (now Intel Programmable Solutions Group) |
| Logic Type | UV-Erasable Programmable Logic Device (EPLD) | — |
| Technology | CMOS, EPROM cell | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| Dedicated Inputs | 19 | — |
| I/O Pins | 48 (bi-directional) | — |
| Propagation Delay (tPD) | 55 ns | — |
| Maximum Clock Frequency (fMAX) | 33.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | — |
| External Clock Inputs | 1 global + shared inputs | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Package Type | CQFP-100, ceramic windowed (WM) | — |
| Military Screening | MIL-STD-883 Class B (883B suffix) | — |
| Temperature na Operasyon | [DATA_NEEDED: military/industrial temperature grade] | -55C to +125C (MIL-STD-883B screening) |
| Programming Method | UV erase + EPROM programming | — |
| Tindminan RoHS | [DATA_NEEDED: confirmed RoHS for ceramic windowed CQFP] | [DATA_NEEDED: RoHS compliance status] |
| Uri ng Pagpapasok | Surface Mount (CQFP with J-leads) | Through-Hole (Pin Grid Array) |
| Series | — | MAX 5000 |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Usable Gates | — | 5,000 |
| User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| Packhaging | — | 100-pin CPGA (S-CPGA-P100) |
| Bilang ng Pin | — | 100 |
| Volte ng Pagbibigay | — | 5 V |
| Logic Family | — | CMOS, TTL-compatible |
| Configuration Memory | — | Non-volatile EEPROM |
| Propagation Delay | — | [DATA_NEEDED: tpd in ns] |
| Screening Level | — | MIL-STD-883B Class B |
| Lead Free Status | — | Lead free / RoHS Compliant (per ICComponents listing) |
| Programmable Security | — | Yes (security bit) |