EPM5192GI84 vs EPM5192GC1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GI84 sa pamamagitan ng Altera at EPM5192GC1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GI84 | EPM5192GC1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable / OTP Complex PLD (CPLD) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | — |
| Logic Array Blocks | [DATA_NEEDED: number of LABs] | — |
| Packhaging | 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) | — |
| Package Code | WPGA | — |
| Operating Voltage (VCC) | 5 V (typical) | — |
| I/O Logic Compatibility | TTL | — |
| Temperature Grade | Industrial | — |
| Programmable Flip-Flop Modes | D, T, JK, SR | — |
| Programmability | UV-erasable (windowed) / OTP | — |
| Programming File Format | JEDEC map via MAX+PLUS II / A+PLUS | — |
| Propagation Delay | [DATA_NEEDED: tPD in ns] | [DATA_NEEDED: tpd specification] |
| Max User I/O Pins | [DATA_NEEDED: usable I/O count for this package] | — |
| Hanay ng Temperature na Operasyon | -40 C to +85 C (industrial) | — |
| Uri ng Pagpapasok | Through-Hole (PGA socket or PCB pin/peg) | Through-hole (PGA) |
| Tindminan RoHS | [DATA_NEEDED: most legacy PGA parts are non-RoHS] | unknown |
| Lead-Free | [DATA_NEEDED: legacy part, likely contains lead] | — |
| Number of Terminals | 84 | — |
| Terminal Form | PIN/PEG | — |
| Package Shape | SQUARE | — |
| Macro Cells | — | 192 |
| Usable Gates | — | 3,750 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Programming Technology | — | UV-Erasable / OTP EPROM |
| Package Type | — | Ceramic PGA (Pin Grid Array) |
| Logic Elements | — | 192 macrocells with AND/OR array |
| Process Technology | — | EPROM-based CMOS |
| Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| Bilang ng Pins | — | [DATA_NEEDED: pin count for GC1 PGA package] |
| Development Tool | — | Altera MAX+PLUS II |