EPM5192LC84-2 vs EPM5192LC84-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC84-2 sa pamamagitan ng Altera at EPM5192LC84-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC84-2 | EPM5192LC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | EPLD (UV-Erasable / OTP Complex PLD) |
| Macrocells | 192 | 192 |
| Packhaging | 84-pin PLCC (LC) | 84-pin PLCC (LC84) |
| Speed Grade | -2 | -1 |
| Volte ng Pagbibigay | 5 V (TTL-compatible I/O) | — |
| Technology | CMOS, UV-erasable / OTP | — |
| Logic Elements | AND-OR array with macrocell flip-flops | — |
| Programming Method | Altera legacy programmer (JEDEC bitstream) | — |
| Temperature na Operasyon | Commercial (0C to +70C) | 0C to +70C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (J-lead) |
| Tindminan RoHS | Non-compliant (SnPb lead finish typical for this vintage) | [DATA_NEEDED: not stated in provided data] |
| Katayuan ng Lifecycle | Obsolete (last Altera MAX 5000 production) | — |
| JTAG Support | Vendor-specific programming interface (pre-IEEE 1532) | — |
| I/O Standard | TTL, 5V CMOS-compatible | — |
| Logic Array Blocks (LABs) | — | 16 |
| Usable Gates | — | 7,500 |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD ns value] |
| Supply Voltage (VCC) | — | 5 V |
| Program Memory Type | — | UV-EPROM / OTP |
| I/O Count | — | [DATA_NEEDED: I/O pin count] |
| Process Technology | — | CMOS EPROM |