EPM5192LC84-2 vs EPM5192LC84-1 比較
詳細並排比較 EPM5192LC84-2 由 Altera 與 EPM5192LC84-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192LC84-2 | EPM5192LC84-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | EPLD (UV-Erasable / OTP Complex PLD) |
| Macrocells | 192 | 192 |
| 封裝 | 84-pin PLCC (LC) | 84-pin PLCC (LC84) |
| Speed Grade | -2 | -1 |
| 供應電壓 | 5 V (TTL-compatible I/O) | — |
| Technology | CMOS, UV-erasable / OTP | — |
| Logic Elements | AND-OR array with macrocell flip-flops | — |
| Programming Method | Altera legacy programmer (JEDEC bitstream) | — |
| 工作溫度 | Commercial (0C to +70C) | 0C to +70C (commercial) |
| 安裝類型 | Surface Mount | Surface Mount (J-lead) |
| RoHS 狀態 | Non-compliant (SnPb lead finish typical for this vintage) | [DATA_NEEDED: not stated in provided data] |
| 生命週期狀態 | Obsolete (last Altera MAX 5000 production) | — |
| JTAG Support | Vendor-specific programming interface (pre-IEEE 1532) | — |
| I/O Standard | TTL, 5V CMOS-compatible | — |
| Logic Array Blocks (LABs) | — | 16 |
| Usable Gates | — | 7,500 |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD ns value] |
| Supply Voltage (VCC) | — | 5 V |
| Program Memory Type | — | UV-EPROM / OTP |
| I/O Count | — | [DATA_NEEDED: I/O pin count] |
| Process Technology | — | CMOS EPROM |