EPM570ZM100I8N vs 5M240ZM68I5N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM570ZM100I8N sa pamamagitan ng Altera at 5M240ZM68I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Intel
5M240ZM68I5N 5M240ZM68I5N - 68-Ball Industrial MAX V CPLD | Intel

5M240ZM68I5N - 68-Ball Industrial MAX V CPLD | Intel

5M240ZM68I5N ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro EPM570ZM100I8N 5M240ZM68I5N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Device Family MAX II —
Series EPM570Z MAX V
Logic Elements 570 240
Number of Macrocells 440 192
Number of Logic Array Blocks (LABs) 57 —
User I/Os 76 —
Maximum Operating Frequency 152 MHz —
Propagation Delay (tPD) 9 ns 7.5 ns
Operating Supply Voltage (Core) 1.8 V —
Programming Technology Flash, non-volatile —
In-System Programmability (ISP) Yes (JTAG) —
Boundary Scan IEEE 1149.1 (JTAG) —
Hanay ng Temperature na Operasyon -40 C to +85 C (Industrial) —
Style ng Pagpapasok SMD/SMT —
Packhaging / Kaso 100-ball FineLine BGA (MBGA, 0.8 mm pitch) —
Packaging Tray —
Device Type — CPLD (Complex Programmable Logic Device)
Configuration Memory — Nonvolatile Flash
Package Type — TFBGA-68
Number of Terminals — 68 (ball)
Package Code — TFBGA
Form of Terminal — Ball
Package Shape — Square
Operating Temperature Grade — Industrial
JTAG Interface — TMS, TDI, TDO, TCK (Bank 1)
Programming Method — JTAG / in-system programmable
Volte ng Pagbibigay — [DATA_NEEDED: VCCINT and VCCIO levels]
I/O Standards — Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins)
Uri ng Pagpapasok — Surface Mount
Tindminan RoHS — Compliant
Lead Free — Yes

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