EPM570ZM100I8N vs 5M240ZM68I5N 比較
詳細並排比較 EPM570ZM100I8N 由 Altera 與 5M240ZM68I5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570ZM100I8N | 5M240ZM68I5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Family | MAX II | — |
| Series | EPM570Z | MAX V |
| Logic Elements | 570 | 240 |
| Number of Macrocells | 440 | 192 |
| Number of Logic Array Blocks (LABs) | 57 | — |
| User I/Os | 76 | — |
| Maximum Operating Frequency | 152 MHz | — |
| Propagation Delay (tPD) | 9 ns | 7.5 ns |
| Operating Supply Voltage (Core) | 1.8 V | — |
| Programming Technology | Flash, non-volatile | — |
| In-System Programmability (ISP) | Yes (JTAG) | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| 工作溫度範圍 | -40 C to +85 C (Industrial) | — |
| 安裝方式 | SMD/SMT | — |
| 封裝 / 外殼 | 100-ball FineLine BGA (MBGA, 0.8 mm pitch) | — |
| Packaging | Tray | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Configuration Memory | — | Nonvolatile Flash |
| Package Type | — | TFBGA-68 |
| Number of Terminals | — | 68 (ball) |
| Package Code | — | TFBGA |
| Form of Terminal | — | Ball |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| JTAG Interface | — | TMS, TDI, TDO, TCK (Bank 1) |
| Programming Method | — | JTAG / in-system programmable |
| 供應電壓 | — | [DATA_NEEDED: VCCINT and VCCIO levels] |
| I/O Standards | — | Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins) |
| 安裝類型 | — | Surface Mount |
| RoHS 狀態 | — | Compliant |
| Lead Free | — | Yes |