EPM9320GC280-20 vs EPM9560GC280-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320GC280-20 sa pamamagitan ng Altera at EPM9560GC280-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320GC280-20 | EPM9560GC280-20 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 320 | 560 |
| Usable Gates | 6000 (approx.) | 12,000 |
| Logic Array Blocks (LABs) | 20 (16 macrocells each, typical for MAX 9000) | — |
| Maximum Operating Frequency | 100 MHz (internal counter) | — |
| Propagation Delay (tpd) | 23 ns (approx., -20 speed grade) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | — |
| JTAG Support | IEEE Std. 1149.1 compliant | — |
| Packhaging | 280-pin Ceramic Pin Grid Array (CPGA) | 280-pin CPGA (Ceramic Pin Grid Array) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: commercial/industrial/military grade] |
| Uri ng Pagpapasok | Through-Hole (PGA socket) | Through-Hole (CPGA socket) |
| Tindminan RoHS | unknown | [DATA_NEEDED: CPGA package historically contains Pb; likely non-compliant] |
| Configuration Memory | EEPROM (non-volatile, instant-on) | — |
| Maximum User I/O | — | 212 |
| Pin-to-Pin Delay | — | 20 ns (speed grade -20) |
| Counter Frequency (max) | — | 100 MHz |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V (5.0 V nominal) |
| I/O Voltage | — | 3.3 V or 5.0 V configurable |
| Process Technology | — | CMOS EEPROM |
| In-System Programming | — | Yes, via IEEE 1149.1 JTAG |