EPM9320GC280-20 vs EPM9560GC280-20 Comparison

Detailed side-by-side comparison of EPM9320GC280-20 by Altera and EPM9560GC280-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320GC280-20 EPM9560GC280-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $67.00 $360.00
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 320 560
Usable Gates 6000 (approx.) 12,000
Logic Array Blocks (LABs) 20 (16 macrocells each, typical for MAX 9000) β€”
Maximum Operating Frequency 100 MHz (internal counter) β€”
Propagation Delay (tpd) 23 ns (approx., -20 speed grade) β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) β€”
Technology CMOS EEPROM β€”
In-System Programmability Yes (5.0-V ISP via JTAG) β€”
JTAG Support IEEE Std. 1149.1 compliant β€”
Package 280-pin Ceramic Pin Grid Array (CPGA) 280-pin CPGA (Ceramic Pin Grid Array)
Operating Temperature [DATA_NEEDED: operating temperature grade] [DATA_NEEDED: commercial/industrial/military grade]
Mounting Type Through-Hole (PGA socket) Through-Hole (CPGA socket)
RoHS Status unknown [DATA_NEEDED: CPGA package historically contains Pb; likely non-compliant]
Configuration Memory EEPROM (non-volatile, instant-on) β€”
Maximum User I/O β€” 212
Pin-to-Pin Delay β€” 20 ns (speed grade -20)
Counter Frequency (max) β€” 100 MHz
Supply Voltage (VCCINT) β€” 4.75 V to 5.25 V (5.0 V nominal)
I/O Voltage β€” 3.3 V or 5.0 V configurable
Process Technology β€” CMOS EEPROM
In-System Programming β€” Yes, via IEEE 1149.1 JTAG

Datasheets & Resources

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