EPM9320RI208-10N vs EPM9320RI208-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320RI208-10N sa pamamagitan ng Altera at EPM9320RI208-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320RI208-10N | EPM9320RI208-20 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | 6,000 |
| Macro Cells | 320 | — |
| Logic Array Blocks (LABs) | 20 | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum System Clock Frequency | 100 MHz | — |
| Volte ng Pagbibigay | 5 V | — |
| I/O Voltage | 5 V | — |
| User I/O Pins | 160 | [DATA_NEEDED: I/O pin count for 208-pin RQFP] |
| Packhaging | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (Power Quad Flat Pack) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG/ISP) | Yes - IEEE 1149.1 JTAG, 5.0-V ISP |
| Hanay ng Temperature na Operasyon | -40C to +85C (industrial) | — |
| Tindminan RoHS | Compliant (N suffix = lead-free) | [DATA_NEEDED: RoHS compliance] |
| Lead Finish | Lead-free (matte tin) | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Macrocells | — | 320 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| Logic Elements / LABs | — | 20 Logic Array Blocks (16 macro cells each) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Dedicated Input Pins | — | 4 (low-skew global) |
| Operating Temperature Grade | — | Industrial |
| Technology | — | CMOS EEPROM |