EPM9320RI208-10N vs EPM9320RI208-20 对比
详细并排对比 EPM9320RI208-10N 出自 Altera 和 EPM9320RI208-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9320RI208-10N | EPM9320RI208-20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $27.20 | $18.95 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | 6,000 |
| Macro Cells | 320 | — |
| Logic Array Blocks (LABs) | 20 | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum System Clock Frequency | 100 MHz | — |
| 电源电压 | 5 V | — |
| I/O Voltage | 5 V | — |
| User I/O Pins | 160 | [DATA_NEEDED: I/O pin count for 208-pin RQFP] |
| 封装 | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (Power Quad Flat Pack) |
| 安装类型 | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG/ISP) | Yes - IEEE 1149.1 JTAG, 5.0-V ISP |
| 工作温度范围 | -40C to +85C (industrial) | — |
| RoHS 状态 | Compliant (N suffix = lead-free) | [DATA_NEEDED: RoHS compliance] |
| Lead Finish | Lead-free (matte tin) | — |
| MSL 等级 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Macrocells | — | 320 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| Logic Elements / LABs | — | 20 Logic Array Blocks (16 macro cells each) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Dedicated Input Pins | — | 4 (low-skew global) |
| Operating Temperature Grade | — | Industrial |
| Technology | — | CMOS EEPROM |