EPM9320RI208-20 vs EPM9320RC208-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320RI208-20 sa pamamagitan ng Intel at EPM9320RC208-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9320RI208-20 EPM9320RC208-15
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 9000 —
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 320 —
Usable Gates 6,000 6,000
Propagation Delay (tPD) 20 ns —
Maximum Operating Frequency 100 MHz —
Supply Voltage (VCC) 5.0 V —
Logic Elements / LABs 20 Logic Array Blocks (16 macro cells each) —
Programmable Interconnect Programmable Interconnect Array (PIA) —
In-System Programmability Yes - IEEE 1149.1 JTAG, 5.0-V ISP Yes (ISP via JTAG)
Dedicated Input Pins 4 (low-skew global) —
User I/O Pins [DATA_NEEDED: I/O pin count for 208-pin RQFP] —
Packhaging 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Power QFP)
Operating Temperature Grade Industrial —
Technology CMOS EEPROM —
Uri ng Pagpapasok Surface Mount Surface Mount
Level ng MSL [DATA_NEEDED: MSL rating] —
Tindminan RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Device Family — MAX 9000
Macro Cells — 320
Pin-to-Pin Propagation Delay — 15 ns (speed grade -15)
Maksimum na Taktiko ng Oras — 117.6 MHz
Volte ng Pagbibigay — 5.0 V
Configuration Technology — EEPROM-based (non-volatile)
JTAG Interface — IEEE Std. 1149.1
Package Type — 208-BFQFP Exposed Pad
Temperature na Operasyon — [DATA_NEEDED: operating temperature range]
Number of I/O Pins — [DATA_NEEDED: user I/O count]
Logic Array Blocks — [DATA_NEEDED: LAB count]
Katayuan ng Lifecycle — Obsolete (PDN0706, 2007)

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