EPM9560ABC356-10 vs EPM9560GC280-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ABC356-10 sa pamamagitan ng Altera at EPM9560GC280-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9560ABC356-10 EPM9560GC280-15
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Device Family MAX 9000A —
Product Series MAX 9000 —
Macrocells 560 —
Usable Gates 12,000 —
Logic Array Blocks (LABs) 35 —
Maximum User I/Os 216 —
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Counter Frequency 144 MHz —
Volte ng Pagbibigay 4.75 V to 5.25 V (5 V nominal) —
Programmability EEPROM, 5-V In-System Programmable (ISP) In-System Programmable (ISP) via JTAG IEEE 1149.1
JTAG Interface IEEE Std. 1149.1 compliant —
PCI Compliance PCI Local Bus Specification Revision 2.2 —
Temperature na Operasyon 0 °C to 70 °C (Commercial) —
Packhaging 356-LBGA (35 x 35 mm) —
Uri ng Pagpapasok Surface Mount Through-Hole
Tindminan RoHS [DATA_NEEDED: rohs status] Non-compliant (ceramic CPGA, contains lead)
Family — MAX 9000
Device Type — EE PLD (CMOS EEPROM-based CPLD)
Macro Cells — 560
Typical Gates — 12,000
Maximum Operating Frequency — 117.6 MHz
Propagation Delay (tpd) — 15 ns (speed grade -15)
Propagation Delay (alternate datasheet figure) — 16.6 ns
Supply Voltage (VCCINT/VCCIO) — 5.0 V
Operating Temperature (Commercial) — 0C to +70C
Package Type — CPGA-280 (Ceramic Pin Grid Array, 280 pins)
Technology — CMOS EEPROM, 0.5 um process (MAX third-gen)
Architecture — Multiple Array MatriX (MAX)
Katayuan ng Lifecycle — Obsolete (legacy Altera MAX 9000 family)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita