EPM9560ARC208-10 vs EPM9320RC208-20 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC208-10 sa pamamagitan ng Intel at EPM9320RC208-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9560ARC208-10 EPM9320RC208-20
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family MAX 9000A (Multiple Array MatriX) —
Programmable Logic Type CPLD (Complex Programmable Logic Device) —
Usable Gates 12,000 gates 6,000
Macrocells 560 macrocells 320
Logic Array Blocks 35 LABs —
User I/O Pins 153 I/O —
Propagation Delay (tPD) 10 ns (speed grade -10) —
Internal Frequency 144.9 MHz —
Volte ng Pagbibigay 5.0 V —
Logic Family CMOS —
Configuration Technology EEPROM (non-volatile, in-system programmable) —
JTAG Interface IEEE 1149.1 boundary-scan (ISP) —
Temperature na Operasyon 0 C to +70 C (commercial) 0 °C to 70 °C (commercial)
Packhaging 208-pin RQFP (PowerQuad Flat Pack) with exposed pad 208-RQFP, exposed pad (208-BFQFP)
Uri ng Pagpapasok Surface Mount Surface Mount
Tindminan RoHS [DATA_NEEDED: RoHS status] —
Bilang ng Pin 208 pins —
Family — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) — 20
Maximum I/O Pins — 132
Propagation Delay (tPD max) — 20 ns
Supply Voltage (VCCINT) — 4.75 V to 5.25 V
Programming Technology — EEPROM, in-system programmable (ISP)
Boundary-Scan Interface — IEEE Std. 1149.1 (JTAG)
Architecture — Multiple Array Matrix (MAX), 3rd generation
Process Technology — CMOS, 5.0 V EEPROM
Reprogrammability — Yes, unlimited ISP cycles

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