EPM9560ARC240-10 vs EPM9560R1208-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC240-10 sa pamamagitan ng Altera at EPM9560R1208-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560ARC240-10 | EPM9560R1208-20 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | Multiple Array MatriX (MAX) - third generation | Multiple Array MatriX (MAX) with Logic Array Blocks (LABs) and Programmable Interconnect Array (PIA) |
| Usable Gates | 12,000 | 6,000 |
| Macrocells | 560 | 560 |
| User I/Os (this package) | 191 (per Mouser listing) | — |
| Internal Frequency | 144.9 MHz | — |
| Propagation Delay (tpd) | 11.4 ns | — |
| Supply Voltage - Internal (VCCINT) | 5.0 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V (selectable) | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM, third-generation MAX architecture |
| Packhaging | 240-pin PowerQuad QFP (RQFP / EAR240) | R-1208 (BGA-style fine-pitch) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | On-chip EEPROM (non-volatile) |
| Logic Family | CMOS | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirm via current distributor data] |
| Logic Array Blocks | — | 52 (typical for 560 macrocells) |
| Maximum User I/O | — | 212 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Frequency (fMAX) | — | 125 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Uri ng Pagpapasok | — | Surface Mount |
| Boundary-Scan Test | — | JTAG IEEE Std. 1149.1 |