EPM9560ARC240-10 vs EPM9560R1208-20 Karşılaştırma

Ayrıntılı yan yana karşılaştırma EPM9560ARC240-10 tarafından Altera ve EPM9560R1208-20 tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.

Özellik Karşılaştırması

Parametre EPM9560ARC240-10 EPM9560R1208-20
Marka Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Yaşam Döngüsü Durumu Obsolete Obsolete
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture Multiple Array MatriX (MAX) - third generation Multiple Array MatriX (MAX) with Logic Array Blocks (LABs) and Programmable Interconnect Array (PIA)
Usable Gates 12,000 6,000
Macrocells 560 560
User I/Os (this package) 191 (per Mouser listing) —
Internal Frequency 144.9 MHz —
Propagation Delay (tpd) 11.4 ns —
Supply Voltage - Internal (VCCINT) 5.0 V —
I/O Supply Voltage (VCCIO) 3.3 V or 5.0 V (selectable) —
Process Technology CMOS EEPROM CMOS EEPROM, third-generation MAX architecture
Paket 240-pin PowerQuad QFP (RQFP / EAR240) R-1208 (BGA-style fine-pitch)
İşletim Sıcaklığı 0C to +70C (commercial) 0C to +70C (commercial)
Configuration Memory EEPROM (non-volatile, in-system programmable) On-chip EEPROM (non-volatile)
Logic Family CMOS —
RoHS Durumu [DATA_NEEDED: RoHS status] [DATA_NEEDED: confirm via current distributor data]
Logic Array Blocks — 52 (typical for 560 macrocells)
Maximum User I/O — 212
Propagation Delay (tPD) — 20 ns
Maximum Frequency (fMAX) — 125 MHz
Supply Voltage (VCCINT/VCCIO) — 5.0 V
Technology — CMOS EEPROM
In-System Programmability — Yes (IEEE 1149.1 JTAG)
Montaj Türü — Surface Mount
Boundary-Scan Test — JTAG IEEE Std. 1149.1

Dökümanlar & Kaynaklar

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