EPM9560GC280-20N vs EPM9560GC280-15N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560GC280-20N sa pamamagitan ng Altera at EPM9560GC280-15N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560GC280-20N | EPM9560GC280-15N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | Multiple Array MatriX (MAX) 3rd generation |
| Technology | CMOS EEPROM-based | — |
| Usable Gates | 6,000 to 12,000 | 12,000 (typical) |
| Macrocells | 560 | — |
| User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Maximum Counter Frequency | 144 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| I/O Voltage | 3.3 V or 5 V (configurable) | — |
| In-System Programmability | Yes (5.0-V ISP via IEEE 1149.1 JTAG) | Yes (5.0-V ISP via JTAG) |
| Packhaging | 280-pin CPGA (Ceramic Pin Grid Array) | CPGA-280 (Ceramic Pin Grid Array, 280 pins) |
| Configuration Memory | EEPROM (non-volatile, instant-on) | — |
| PCI Compliance | Yes | — |
| Temperature na Operasyon | [DATA_NEEDED: industrial/commercial grade] | — |
| Tindminan RoHS | [DATA_NEEDED] | — |
| Device Family | — | MAX 9000 |
| Product Type | — | EE PLD / CPLD |
| Macrocell Count | — | 560 |
| Propagation Delay (tPD) | — | 16.6 ns |
| Maksimum na Taktiko ng Oras | — | 117.6 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Maximum Supply Voltage | — | 5.25 V |
| Logic Technology | — | CMOS EEPROM |
| Boundary-Scan (JTAG) | — | IEEE Std. 1149.1 compliant |
| Package Code | — | PGA / CPGA280 |
| Terminal Form | — | PIN/PEG |
| Operating Temperature Grade | — | Commercial |