EPM9560RI210-15 vs EPM9560RC210-20 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI210-15 sa pamamagitan ng Altera at EPM9560RC210-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPM9560RC210-20 EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera

EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera

EPM9560RC210-20 ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EPM9560RI210-15 EPM9560RC210-20
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Huling Pagbili
Family MAX 9000 (EPM9560) MAX 9000
Device Type Complex Programmable Logic Device (CPLD) —
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 20 16
User I/O Pins 164 —
Pin-to-Pin Delay (tPD) 15 ns (-15 speed grade) 20 ns
Supply Voltage (VCCINT) 5.0 V —
I/O Voltage (MultiVolt) 3.3 V / 5.0 V compatible —
Configuration Memory EEPROM (non-volatile) —
In-System Programmability Yes (JTAG ISP) Yes (MAX+PLUS II flow)
JTAG Boundary Scan IEEE 1149.1 compliant —
Packhaging 210-pin RQFP (PowerQuad) RQFP-210 (Power Quad Flat Pack, 0.5mm pitch)
Temperature na Operasyon Industrial (-40C to +85C) [DATA_NEEDED: commercial 0C to 70C typical; industrial variants exist]
Uri ng Pagpapasok Surface Mount Surface Mount
Tindminan RoHS ROHS3 Compliant RoHS3 Compliant (per supplier listing)
Level ng Sensitivity sa Asid ng Moisture (MSL) 3 (168 Hours) —
Manufacturer Standard Lead Time 1-7 Days (distributor stock) —
Product Type — CPLD (Complex Programmable Logic Device)
Clock-to-Output (tCO) — 12 ns
Maximum User I/O — [DATA_NEEDED: 212 I/O per datasheet, package-dependent]
Volte ng Pagbibigay — 5 V
Process Technology — 0.65 um EEPROM
Boundary-Scan (JTAG) — IEEE Std 1149.1 compliant

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