H5ANAG6NCR-RDC vs H5ANAG8NCJR-XNC Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng H5ANAG6NCR-RDC sa pamamagitan ng SK hynix at H5ANAG8NCJR-XNC sa pamamagitan ng SK hynix. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | H5ANAG6NCR-RDC | H5ANAG8NCJR-XNC |
|---|---|---|
| Brand | SK hynix | SK hynix |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Katayuan ng Stock | — | In Stock |
| Presyo ng Yunit (USD) | — | $65.63 |
| Uri ng Memory | DDR4 SDRAM | DDR4 SDRAM |
| Laki ng Memory | 16 Gb (2 GB) | — |
| Organisasyon | 1G x 16 | 2G x 8 |
| Rate ng Data | 3200 Mbps (PC4-25600 class) | 3200 MT/s (DDR4-3200) |
| Supply Voltage (VDD) | 1.2 V | 1.2 V |
| Packhaging | 96-ball FBGA | FBGA-78 (7.5 x 11 mm) |
| Package Body | Rectangular, 8 mm width | — |
| Maximum Standby Current | 0.074 A | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Number of Terminals (Balls) | 96 | — |
| Auto Self-Refresh | Yes | — |
| Auto Precharge | Yes | — |
| Asynchronous Reset | Yes | — |
| Data Mask (DM) Function | Yes | — |
| Dynamic On-Chip Termination (ODT) | Yes | — |
| ZQ Calibration | Yes | — |
| CRC Function | Yes | — |
| Write Leveling | Yes | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS Status] | Compliant |
| Temperature na Operasyon | [DATA_NEEDED: Operating Temperature Range] | 0C to +95C |
| Refresh Interval | [DATA_NEEDED: Refresh Interval] | — |
| Density | — | 16 Gbit |
| Process Node | — | 1z nm (non-EUV) |
| Die Bit Density | — | 0.296 Gb/mm2 |
| Peak Bandwidth (per 64-bit channel) | — | 25.6 GB/s at DDR4-3200 |
| CAS Latency (CL) | — | [DATA_NEEDED: CAS Latency] |
| Refresh | — | [DATA_NEEDED: refresh specification] |
| Base Part Number Family | — | H5ANAG8NCJR (16Gb DDR4 CMOS SDRAM) |
| Speed Grade Suffix | — | -XNC (0~95C commercial) |