EPM3064ATI44-10N vs EPM3064AT100-10N Karşılaştırma

Ayrıntılı yan yana karşılaştırma EPM3064ATI44-10N tarafından Altera ve EPM3064AT100-10N tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.

Özellik Karşılaştırması

Parametre EPM3064ATI44-10N EPM3064AT100-10N
Marka Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Yaşam Döngüsü Durumu Obsolete NRND
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 64
Usable Gates 1250 1,250
User I/Os 34 —
Dedicated Inputs 4 —
Logic Blocks 4 —
Pin-to-Pin Delay 10 ns (-10 speed grade) —
Maximum Frequency (fMAX) 100 MHz —
Programmable Type In-System Programmable (EEPROM) —
ISP Interface IEEE Std. 1149.1 (JTAG) —
ISP Standard Compliance IEEE Std. 1532 —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 2.5 V (MultiVolt) —
İşletim Sıcaklığı -40C to +85C (Industrial, "N" suffix) —
Paket 44-pin TQFP TQFP-100 (T100), 14 mm x 14 mm
Process Technology CMOS EEPROM —
Boundary-Scan Test Built-in (JTAG) —
Montaj Türü Surface Mount —
Lead-Free Status Contains Lead (per digchip datasheet excerpt) —
RoHS Durumu Non-Compliant (per digchip datasheet excerpt) [DATA_NEEDED: RoHS compliance status]
Device Type — CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) — 4
User I/O Pins — 66
Speed Grade — -10 (10 ns pin-to-pin delay)
Supply Voltage (VCCINT) — 3.3 V
I/O Bank Voltage — 3.3 V
5 V Tolerant Inputs — Yes (via clamping diodes)
Configuration Memory — EEPROM (non-volatile)
Programming Interface — JTAG (IEEE Std. 1149.1) with pin-locking
ISP Compliance — IEEE Std. 1532
Boundary-Scan Test (BST) — IEEE Std. 1149.1 compliant
Operating Temperature (Commercial) — 0C to +70C
Lead-Free — [DATA_NEEDED: lead-free finish]

Dökümanlar & Kaynaklar

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