RTAX2000D-CQ352B vs RTAX2000D-1CQ352B موازنہ
تفصیلی ساتھ ساتھ موازنہ از RTAX2000D-CQ352B بذریعہ Microsemi اور RTAX2000D-1CQ352B بذریعہ Microchip Technology. اہم خصوصیات، برقی پیرامیٹرز، پیکیجنگ، لائف سائیکل اسٹیٹس، قیمتوں اور دستیابی کا موازنہ کریں تاکہ آپ کی ڈیزائن ضروریات کے لیے بہترین کمپوننٹ کا تعین ہو سکے۔
Microsemi
RTAX2000D-CQ352B - 2M-Gate Rad-Tolerant FPGA, CQFP-352 | Microchip
RTAX2000D-CQ352B ✓ فعالMicrochip Technology
RTAX2000D-1CQ352B - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000D-1CQ352B ✓ فعالخصوصیات کا موازنہ
| پیرامیٹر | RTAX2000D-CQ352B | RTAX2000D-1CQ352B |
|---|---|---|
| برانڈ | Microsemi | Microchip Technology |
| زمرہ | FPGA & CPLD | FPGA & CPLD |
| لائف سائیکل کی حالت | فعال | فعال |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-S/SL and RTAX-DSP (RTAX2000D) |
| Equivalent System Gates | 2000000 | 2,000,000 |
| Logic Cells | 29568 | — |
| CLBs | 19712 | — |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) | 1.5 V nominal (1.425 V to 1.575 V) |
| Process Technology | CMOS antifuse | — |
| Configuration Type | One-time programmable antifuse, live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits SRAM with optional EDAC |
| Clocking Features | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| پیکیج | CQFP-352 ceramic quad flat pack | 352-pin Ceramic Column Grid Array (CQ352) |
| Screening / Speed Grade | B (burn-in screening); D suffix = tighter ICCA limits at 125C final test | — |
| ماؤنٹنگ ٹائپ | Surface Mount | Surface Mount (ceramic column grid array) |
| Application Domain | Space-flight systems | Space-flight, radiation-tolerant |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per family datasheet) | — |
| RoHS اسٹیٹس | [DATA_NEEDED: RoHS Status] | — |
| آپریٹنگ درجہ حرارت | [DATA_NEEDED: Operating Temperature Range] | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O Bank Supply Voltage] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O Count] | — |
| Technology | — | Antifuse (nonvolatile), Digital CMOS |
| CLBs (Logic Cells) | — | 19,712 CLBs / 29,568 logic cells (per family organization) |
| DSP Mathblocks | — | Up to 120 (18-bit x 18-bit MAC) |
| DSP Performance | — | 125 MHz 18-bit x 18-bit multiply-accumulate |
| Total Ionizing Dose | — | 300 krad (Si) functional / 200 krad (Si) with operation |
| Speed Grade | — | -1 |
| Temperature Range | — | Commercial (C) |
| Configuration | — | Live at power-up, no external configuration device (antifuse) |
| Routing Features | — | Segmentable clocks, chip-wide highway routing, carry logic |
| Embedded SRAM Features | — | Built-in FIFO control logic |