DSPIC33FJ128MC706AT-I/MR - 16-bit 40MIPS DSC, 128KB Flash, 64-VQFN | Microchip
MPN: DSPIC33FJ128MC706AT-I/MR ✓ Hoạt độngDSPIC33FJ128MC706AT-I/MR Tóm tắt
A Digital Signal Controller (DSC) is a hybrid architecture that combines the deterministic real-time control of a microcontroller with the computational throughput of a DSP. DSCs sit in the taxonomy as: dsPIC33F -> DSC -> microcontroller -> embedded MCU -> semiconductor. They are widely used for motor control, power conversion, and sensor signal processing where both high-bandwidth math and deterministic I/O timing are required.
Key features of the DSPIC33FJ128MC706AT-I/MR include 8 DMA channels, 9 timers, 4 serial I/O ports (UART/SPI/I2C), a 16-bit ADC, motor-control PWMs, and a 3.0 V to 3.6 V single-supply operating range. The wide operating temperature range of -40 °C to +85 °C supports industrial environments. The 64-VQFN (9x9) package exposes a thermal pad that must be soldered for proper heat dissipation at high MIPS loads.
Architecturally, the device uses a modified Harvard architecture with separate program and data buses, a hardware MAC for single-cycle 16x16 DSP operations, and a motor-control PWM module capable of complementary outputs with programmable dead time. This combination enables field-oriented control (FOC) loops for three-phase motor drives within microsecond-level cycle times.
Typical applications include brushless DC (BLDC) motor drives, permanent magnet synchronous motors (PMSM), switched reluctance motor control, three-phase induction motor inverters, digital power conversion, and uninterruptible power supplies (UPS). The DSC's deterministic PWM and ADC triggering make it especially suited to closed-loop motor control at high switching frequencies.
When designing with this device, ensure the exposed pad of the 64-VQFN package is soldered to a sufficiently large copper pour to achieve the rated thermal performance. Decouple VDD/VSS pairs with 100 nF ceramics placed within a few millimetres of each pin pair to keep digital and analog supplies clean.
This page synthesises verified distributor specifications, drop-in same-package alternatives, and practical design guidance not consolidated in the Microchip datasheet alone, giving the engineer a single source for selection and qualification.
Bộ thay thế dễ dàng lắp đặt cho DSPIC33FJ128MC706AT-I/MR — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với DSPIC33FJ128MC706AT-I/MR (cùng hình factor và footprint) — khác nhau ở Package, Operating Temperature, Core Architecture, Timers, Core.
DSPIC33FJ128MC706A-I/MR
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DSPIC33FJ128MC706AT-E/MR
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
DSPIC33FJ128MC506AT-I/MR
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DSPIC33FJ128MC506A-I/MR
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DSPIC33FJ128MC706AT-I/MR Tỷ lệ tối đa & tính chất điện
| Core | dsPIC33F (16-bit DSC) |
| Architecture | Modified Harvard, 16-bit data bus |
| Maximum CPU Speed | 40 MIPS (40 MHz) |
| Program Memory (Flash) | 128 KB (128K x 8) |
| Data RAM | 16 KB (16K x 8) |
| DMA Channels | 8 |
| Timers | 9 |
| Serial I/O Ports | 4 (UART/SPI/I2C) |
| I/O Pins | 53 |
| Điện áp cung cấp hoạt động | 3.0 V to 3.6 V |
| Nhiệt độ hoạt động | -40 °C to +85 °C |
| Hộp | 64-VQFN (9x9 mm) with exposed pad |
| Kiểu lắp đặt | Surface Mount |
| Trạng thái RoHS | Compliant |
Cấu hình chân DSPIC33FJ128MC706AT-I/MR
| Chân 1 | OSC1/CLKI/RA0 — Oscillator crystal input / external clock input / GPIO |
| Chân 2 | OSC2/CLKO/RA1 — Oscillator crystal output / clock output / GPIO |
| Chân 3 | VDD — Positive supply for digital I/O |
| Chân 4 | VSS — Ground reference for digital I/O |
| Chân 5 | PWM1H/RB0 — PWM1 high-side output / GPIO |
| Chân 6 | PWM1L/RB1 — PWM1 low-side output / GPIO |
| Chân 7 | PWM2H/RB2 — PWM2 high-side output / GPIO |
| Chân 8 | PWM2L/RB3 — PWM2 low-side output / GPIO |
| Chân 9 | PWM3H/RB4 — PWM3 high-side output / GPIO |
| Chân 10 | PWM3L/RB5 — PWM3 low-side output / GPIO |
| Chân 11 | AN0/RC0 — Analog input 0 / GPIO |
| Chân 12 | AN1/RC1 — Analog input 1 / GPIO |
| Chân 13 | AN2/RC2 — Analog input 2 / GPIO |
| Chân 14 | AN3/RC3 — Analog input 3 / GPIO |
| Chân 15 | AN4/RC4 — Analog input 4 / GPIO |
| Chân 16 | AN5/RC5 — Analog input 5 / GPIO |
| Chân 17 | AN6/RC6 — Analog input 6 / GPIO |
| Chân 18 | AN7/RC7 — Analog input 7 / GPIO |
| Chân 19 | AVDD — Positive supply for analog peripherals |
| Chân 20 | AVSS — Ground reference for analog peripherals |
| Chân 21 | RD0 — GPIO port D bit 0 |
| Chân 22 | RD1 — GPIO port D bit 1 |
| Chân 23 | RD2 — GPIO port D bit 2 |
| Chân 24 | RD3 — GPIO port D bit 3 |
| Chân 25 | RD4 — GPIO port D bit 4 |
| Chân 26 | RD5 — GPIO port D bit 5 |
| Chân 27 | RD6 — GPIO port D bit 6 |
| Chân 28 | RD7 — GPIO port D bit 7 |
| Chân 29 | VDD — Positive supply for digital I/O |
| Chân 30 | VSS — Ground reference for digital I/O |
| Chân 31 | RE0 — GPIO port E bit 0 |
| Chân 32 | RE1 — GPIO port E bit 1 |
| Chân 33 | RE2 — GPIO port E bit 2 |
| Chân 34 | RE3 — GPIO port E bit 3 |
| Chân 35 | RE4 — GPIO port E bit 4 |
| Chân 36 | RE5 — GPIO port E bit 5 |
| Chân 37 | RE6 — GPIO port E bit 6 |
| Chân 38 | RE7 — GPIO port E bit 7 |
| Chân 39 | RF0 — GPIO port F bit 0 |
| Chân 40 | RF1 — GPIO port F bit 1 |
| Chân 41 | RF2 — GPIO port F bit 2 |
| Chân 42 | RF3 — GPIO port F bit 3 |
| Chân 43 | RF4 — GPIO port F bit 4 |
| Chân 44 | RF5 — GPIO port F bit 5 |
| Chân 45 | RF6 — GPIO port F bit 6 |
| Chân 46 | RF7 — GPIO port F bit 7 |
| Chân 47 | RG0 — GPIO port G bit 0 |
| Chân 48 | RG1 — GPIO port G bit 1 |
| Chân 49 | RG2 — GPIO port G bit 2 |
| Chân 50 | RG3 — GPIO port G bit 3 |
| Chân 51 | RG6/SOSCO — GPIO / secondary oscillator output |
| Chân 52 | RG7/SOSCI — GPIO / secondary oscillator input |
| Chân 53 | RG8/FLTA — GPIO / PWM fault A input |
| Chân 54 | RG9/FLTB — GPIO / PWM fault B input |
| Chân 55 | MCLR — Master clear / reset input (active low) |
| Chân 56 | PGEC1/AN8 — ICSP clock / analog input 8 |
| Chân 57 | PGED1/AN9 — ICSP data / analog input 9 |
| Chân 58 | PGEC2/AN10 — Alternate ICSP clock / analog input 10 |
| Chân 59 | PGED2/AN11 — Alternate ICSP data / analog input 11 |
| Chân 60 | VDD — Positive supply for digital I/O |
| Chân 61 | VSS — Ground reference for digital I/O |
| Chân 62 | U1TX/RF8 — UART1 transmit / GPIO |
| Chân 63 | U1RX/RF2 — UART1 receive / GPIO (alternate function) |
| Chân 64 | VSS — Ground reference for digital I/O |
Ứng dụng tiêu biểu
DSPIC33FJ128MC706AT-I/MR phù hợp cho 6 Áp dụngs: Brushless DC (BLDC) Motor Control, Field-Oriented Control (FOC) for PMSM, Three-Phase Induction Motor Inverter, Switched Reluctance Motor (SRM) Control, Digital Power Conversion (PFC, LLC, PSFB), Uninterruptible Power Supply (UPS) Controller.
Brushless DC (BLDC) Motor Control
The DSPIC33FJ128MC706AT-I/MR is purpose-built for BLDC motor control thanks to its integrated motor-control PWM module with complementary outputs and programmable dead time, a 16-bit ADC with PWM-synchronised sampling, and a 40 MIPS DSP engine capable of running trapezoidal or sinusoidal commutation in real time. Placed as the main controller on the inverter PCB, it drives the three half-bridges via its PWM channels and samples back-EMF through the ADC to close the speed loop. Compared with a generic MCU, the DSC's hardware MAC lets the firmware complete one full electrical revolution of commutation math in under 5 µs, leaving headroom for CAN diagnostics and protection routines.
Được đề xuất
Field-Oriented Control (FOC) for PMSM
Sensorless field-oriented control (FOC) of permanent-magnet synchronous machines is the canonical application for the dsPIC33F family, and the DSPIC33FJ128MC706AT-I/MR is on the target hardware list of Microchip application note AN1078. The 40 MIPS DSP engine handles Clarke/Park transforms, the SVPWM modulator, and the speed/torque PI loops inside a 10-20 µs control cycle. The integrated 8-channel ADC synchronised to the PWM timer gives the clean current samples required for stable FOC, while 128 KB of Flash fits the full state-machine plus tuning parameter tables.
Được đề xuất
Three-Phase Induction Motor Inverter
Three-phase induction motor drives benefit from the DSPIC33FJ128MC706AT-I/MR's 53 digital I/O pins, which easily absorb the gate-driver enable lines, fault inputs, and resolver/external sensor interfaces typical of industrial inverters. The PWM module's complementary outputs with dead-time insertion drive six IGBTs directly through an optocoupler or gate driver such as the IR2233, while the ADC samples DC-bus voltage and phase currents synchronously. The 40 MIPS DSP budget is more than enough for V/F scalar control and entry-level indirect FOC, and the 16 KB RAM holds the per-phase control variables without overflow.
Được đề xuất
Switched Reluctance Motor (SRM) Control
Switched reluctance motors require precise commutation timing and fast current-loop closure — exactly what the DSPIC33FJ128MC706AT-I/MR's motor-control PWM and ADC-triggering hardware provide. With up to 8 DMA channels offloading ADC result transfers, the CPU is free to run the SRM commutation state machine plus torque-sharing functions in real time. The 128 KB Flash holds the full commutation table, and the 4 serial ports provide CAN, RS-485, and isolated SPI links to a system controller or display.
Được đề xuất
Digital Power Conversion (PFC, LLC, PSFB)
High-frequency digital power converters — totem-pole PFC, LLC, phase-shifted full-bridge — rely on the DSPIC33FJ128MC706AT-I/MR's 40 MIPS DP-engine throughput to close voltage and current loops inside sub-10 µs switching periods. The integrated 16-bit ADC with PWM-synchronised sampling eliminates analog timing skews, and the DMA channels move conversion results without CPU overhead. Compared to a traditional analog control loop, the DSC-based design lets the same hardware implement multiple converter topologies via firmware change, drastically reducing SKU count for power-supply manufacturers.
Được đề xuất
Uninterruptible Power Supply (UPS) Controller
Online UPS systems need a controller that can run the inverter DSP loops, monitor battery state-of-charge, and manage mains/transfer switching concurrently. The DSPIC33FJ128MC706AT-I/MR fits this role: its 40 MIPS DSP engine runs the inverter FOC or sinusoidal PWM, the ADC samples battery current and DC-bus voltage, and the 4 serial ports (UART/SPI/I2C) interface to battery-management ICs and front-panel displays. With 128 KB of Flash and 16 KB of RAM, the firmware can include not only the power stage control but also the LCD menu, logging, and Modbus communication stacks.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho DSPIC33FJ128MC706AT-I/MR — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | DSPIC33FJ128MC706A-I/MR | DSPIC33FJ128MC706AT-E/MR | DSPIC33FJ128MC506AT-I/MR | DSPIC33FJ128MC506A-I/MR |
|---|---|---|---|---|---|
| Package | 64-VQFN (9x9 mm) | 64-VQFN (9x9 mm) - same | 64-VQFN (9x9 mm) - same | 64-VQFN (9x9 mm) - same | 64-VQFN (9x9 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core / Max MIPS | dsPIC33F, 40 MIPS | dsPIC33F, 40 MIPS - same | dsPIC33F, 40 MIPS - same | dsPIC33F, 40 MIPS - same | dsPIC33F, 40 MIPS - same |
| Program Flash | 128 KB | 128 KB - same | 128 KB - same | 64 KB (-50 %) | 64 KB (-50 %) |
| Data RAM | 16 KB | 16 KB - same | 16 KB - same | 16 KB - same | 16 KB - same |
| Temperature Range | -40 °C to +85 °C (Industrial) | -40 °C to +85 °C - same | -40 °C to +125 °C (Extended) | -40 °C to +85 °C - same | -40 °C to +85 °C - same |
| DMA Channels | 8 | 8 - same | 8 - same | 8 - same | 8 - same |
| Supply Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V - same | 3.0 V to 3.6 V - same | 3.0 V to 3.6 V - same | 3.0 V to 3.6 V - same |
Bảo phân biệt quan trọng
- Integrated motor-control PWM with hardware dead-time insertion (vsDSPIC33FJ128MC506AT-I/MR)
- Industrial temperature grade in tape-and-reel packaging (vsDSPIC33FJ128MC706A-I/MR)
- 64-VQFN (9x9 mm) smallest-footprint option in the family (vsDSPIC33FJ128MC706AT-I/PT)
Ghi chú thiết kế
Estimated: at FOSC=40 MHz with full DSP utilisation, the 64-VQFN package dissipates up to ~0.6 W (using a typical VDD=3.3 V, IDD=180 mA). Without the exposed pad soldered to a copper pour of at least 25 mm² on each layer (with thermal vias to internal planes), the junction temperature can exceed the +85 °C industrial limit in enclosed housings. Always solder the EP, and use at least 4 thermal vias in a 0.3 mm drill pattern to inner ground planes to keep theta-JA within datasheet limits.
Place 100 nF X7R 0402 decoupling capacitors within 2 mm of every VDD/VSS pair (the package has multiple VDD/VSS pins). Separate the analog AVDD/AVSS supply pair with its own 10 µF + 100 nF LC filter network to keep ADC sampling noise below 1 LSB. Keep PWM output traces short and away from the analog ANx inputs to avoid coupling switching noise into ADC channels during motor switching events.
Do not leave the MCLR pin floating — it must be tied to VDD through a 10 kΩ pull-up and a 100 nF cap to ground for proper reset behaviour. The PGECx/PGEDx ICSP pins must be accessible (test points or header) for in-circuit debugging and firmware updates. Forgetting to solder the exposed pad of the 64-VQFN is the single most common cause of thermal failures and erratic ADC readings in production boards.
Thông tin tuân thủ
RoHS and lead-free compliance per Microchip product page. Not AEC-Q100 qualified — for automotive applications choose the dsPIC33CH or PIC32MK families. REACH compliance statement available on Microchip's compliance portal.
