PIC18F86J11-I/PT - 8-Bit 48MHz MCU, 64KB Flash 80-TQFP | Microchip
MPN: PIC18F86J11-I/PT ✓ Hoạt độngPIC18F86J11-I/PT Tóm tắt
A PIC18 microcontroller is an 8-bit Harvard-architecture MCU from Microchip that sits in the company's mid-to-high tier of 8-bit devices. The PIC18 family sits in the hierarchy: 8-bit MCU -> PIC18 family -> PIC18FxxJxx (Flash, 3 V optimized) -> power management and connectivity ICs. Compared with the older PIC16 family, PIC18 parts add a wider instruction set, larger linear code space, more peripherals, and richer interrupt handling, making them the workhorse choice when engineers need more I/O and memory than a PIC16 can offer but do not need to step up to a 16-bit dsPIC or 32-bit device.
Key features include a 20-bit address bus capable of addressing up to 1 Mbit of Flash, two 8-bit and three 16-bit timers, two synchronous serial ports (I2C and SPI), two asynchronous serial ports (USART with LIN support), a 10-bit ADC, and two analog comparators. The device supports up to 12 MIPS operation at 3.0 V typical supply, with an operating voltage range of 2.0 V to 3.6 V and an industrial temperature range of -40 C to +85 C. The -I/PT suffix indicates industrial temperature grade in TQFP package.
Architecturally, the PIC18F86J11 uses an enhanced Harvard architecture with separate program Flash and data EEPROM/SRAM paths, a 32-level hardware stack, and an 8x8 hardware multiply engine. The 10-bit ADC provides up to 16 channels, and the device includes nanoWatt Technology power management with idle and sleep modes drawing microamp-level currents, suitable for battery-powered or energy-conscious designs.
Typical applications include industrial control and HMI panels, automotive body and comfort modules, USB and connectivity bridges, sensor aggregation nodes, and consumer appliance main controllers. The 80-pin TQFP package exposes ample I/O for parallel displays, keypads, and multiple serial channels concurrently.
When designing with this part, allocate sufficient decoupling (100 nF plus bulk) near each VDD/VSS pair and follow Microchip's recommended trace geometry for the 48 MHz oscillator. The Flash is rated for 1k erase/write cycles minimum, so use EEPROM emulation or external storage for high-write-count applications.
This page synthesizes distributor pricing, same-brand drop-in alternatives, and practical design notes not aggregated in a single manufacturer datasheet.
Bộ thay thế dễ dàng lắp đặt cho PIC18F86J11-I/PT — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PIC18F86J11-I/PT (cùng hình factor và footprint) — khác nhau ở Package, Program Memory (Flash), Core Architecture, Operating Temperature, Timers.
PIC18F86J10-I/PT
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Xem tài liệu →PIC18F87J11-I/PT
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Xem tài liệu →PIC18F85J11-I/PT
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Xem tài liệu →PIC18F86J16-I/PT
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Xem tài liệu →PIC18F85K90-E/PT
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Xem tài liệu →PIC18F85J90-I/PT
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Xem tài liệu →PIC18F86J11-I/PT Tỷ lệ tối đa & tính chất điện
| Core Architecture | PIC18, 8-bit RISC |
| Program Memory (Flash) | 64 KB (32K x 16) |
| Data RAM | 3.9 KB (on-chip SRAM) |
| Maximum CPU Frequency | 48 MHz |
| MIPS Performance | 12 MIPS |
| Supply Voltage (VDD) | 2.0 V to 3.6 V |
| Nhiệt độ hoạt động | -40 C to +85 C (Industrial) |
| Hộp | 80-pin TQFP (PT), 12x12 mm |
| ADC | 10-bit, up to 16 channels |
| Timers | 2 x 8-bit + 3 x 16-bit |
| Communication Interfaces | 2x SPI/I2C + 2x USART (LIN-capable) |
| Analog Comparators | 2 |
| Address Bus Width | 20-bit (up to 1 Mbit Flash addressing) |
| Kiểu lắp đặt | Surface Mount |
| Trạng thái RoHS | Compliant |
| Automotive Qualified | Recommended for automotive design (special order codes) |
Cấu hình chân PIC18F86J11-I/PT
| Chân 1 | RH0/PMD0 — Port H I/O bit 0 / Parallel Master Port data 0 |
| Chân 2 | RH1/PMD1 — Port H I/O bit 1 / PMP data 1 |
| Chân 3 | RH2/PMD2 — Port H I/O bit 2 / PMP data 2 |
| Chân 4 | RH3/PMD3 — Port H I/O bit 3 / PMP data 3 |
| Chân 5 | RH4/PMD4 — Port H I/O bit 4 / PMP data 4 |
| Chân 6 | RH5/PMD5 — Port H I/O bit 5 / PMP data 5 |
| Chân 7 | RH6/PMD6 — Port H I/O bit 6 / PMP data 6 |
| Chân 8 | RH7/PMD7 — Port H I/O bit 7 / PMP data 7 |
| Chân 9 | VSS — Ground reference |
| Chân 10 | VDD — Positive supply voltage (2.0 V to 3.6 V) |
| Chân 11 | AVDD — Analog positive supply |
| Chân 12 | AVSS — Analog ground reference |
| Chân 13 | OSC1/CLKIN — Crystal oscillator input / external clock input |
| Chân 14 | OSC2/CLKOUT — Crystal oscillator output / clock output |
| Chân 15 | RC0/T1OSO — Port C I/O / Timer1 oscillator output |
| Chân 16 | RC1/T1OSI — Port C I/O / Timer1 oscillator input |
| Chân 17 | RC2/CCP1 — Port C I/O / Capture/Compare/PWM 1 |
| Chân 18 | RC3/SCK1/SCL1 — Port C I/O / SPI1 clock / I2C1 clock |
| Chân 19 | RC4/SDI1/SDA1 — Port C I/O / SPI1 data in / I2C1 data |
| Chân 20 | RC5/SDO1 — Port C I/O / SPI1 data out |
| Chân 21 | RC6/TX1/CK1 — Port C I/O / USART1 TX / clock |
| Chân 22 | RC7/RX1/DT1 — Port C I/O / USART1 RX / data |
| Chân 23 | RD0/PSP0 — Port D I/O / Parallel Slave Port 0 |
| Chân 24 | RD1/PSP1 — Port D I/O / PSP 1 |
| Chân 25 | RD2/PSP2 — Port D I/O / PSP 2 |
| Chân 26 | RD3/PSP3 — Port D I/O / PSP 3 |
| Chân 27 | RD4/PSP4 — Port D I/O / PSP 4 |
| Chân 28 | RD5/PSP5 — Port D I/O / PSP 5 |
| Chân 29 | RD6/PSP6 — Port D I/O / PSP 6 |
| Chân 30 | RD7/PSP7 — Port D I/O / PSP 7 |
| Chân 31 | VSS — Ground reference |
| Chân 32 | VDD — Positive supply voltage (2.0 V to 3.6 V) |
| Chân 33 | RE0/RD/AN5 — Port E I/O / Read strobe / Analog input 5 |
| Chân 34 | RE1/WR/AN6 — Port E I/O / Write strobe / Analog input 6 |
| Chân 35 | RE2/CS/AN7 — Port E I/O / Chip select / Analog input 7 |
| Chân 36 | RE3/ADERR — Port E I/O / Address error |
| Chân 37 | RE4/LVDIN — Port E I/O / Low-voltage detect input |
| Chân 38 | RE5/AN8 — Port E I/O / Analog input 8 |
| Chân 39 | RE6/AN9 — Port E I/O / Analog input 9 |
| Chân 40 | RE7/CCP2/AN10 — Port E I/O / CCP2 / Analog input 10 |
| Chân 41 | RF0/AN11 — Port F I/O / Analog input 11 |
| Chân 42 | RF1/AN12/C2OUT — Port F I/O / Analog input 12 / Comparator 2 output |
| Chân 43 | RF2/AN13/C1OUT — Port F I/O / Analog input 13 / Comparator 1 output |
| Chân 44 | RF3/AN14 — Port F I/O / Analog input 14 |
| Chân 45 | RF4/AN15 — Port F I/O / Analog input 15 |
| Chân 46 | RF5/AN16 — Port F I/O / Analog input 16 |
| Chân 47 | RF6/AN17 — Port F I/O / Analog input 17 |
| Chân 48 | RF7/SS1 — Port F I/O / SPI1 slave select |
| Chân 49 | RG0/ECCP3/P3A — Port G I/O / Enhanced CCP3 / PWM output 3A |
| Chân 50 | RG1/TX2/CK2 — Port G I/O / USART2 TX / clock |
| Chân 51 | RG2/RX2/DT2 — Port G I/O / USART2 RX / data |
| Chân 52 | RG3/CCP3/P3D — Port G I/O / CCP3 / PWM output 3D |
| Chân 53 | RG4/CCP4/P1D — Port G I/O / CCP4 / PWM output 1D |
| Chân 54 | RG5/CCP5/P2D — Port G I/O / CCP5 / PWM output 2D |
| Chân 55 | RG6/ECCP2/P2A — Port G I/O / Enhanced CCP2 / PWM output 2A |
| Chân 56 | RG7/ECCP1/P1A — Port G I/O / Enhanced CCP1 / PWM output 1A |
| Chân 57 | VSS — Ground reference |
| Chân 58 | VDD — Positive supply voltage (2.0 V to 3.6 V) |
| Chân 59 | RA0/AN0 — Port A I/O / Analog input 0 |
| Chân 60 | RA1/AN1 — Port A I/O / Analog input 1 |
| Chân 61 | RA2/AN2/VREF- — Port A I/O / Analog input 2 / VREF- |
| Chân 62 | RA3/AN3/VREF+ — Port A I/O / Analog input 3 / VREF+ |
| Chân 63 | RA4/T0CKI — Port A I/O / Timer0 clock input |
| Chân 64 | RA5/AN4/SS2/HLVDIN — Port A I/O / Analog input 4 / SPI2 slave select / High/Low voltage detect |
| Chân 65 | RB0/INT0/FLT0 — Port B I/O / External interrupt 0 / PWM fault 0 |
| Chân 66 | RB1/INT1 — Port B I/O / External interrupt 1 |
| Chân 67 | RB2/INT2 — Port B I/O / External interrupt 2 |
| Chân 68 | RB3/INT3/ECCP2/P2A — Port B I/O / External interrupt 3 / ECCP2 / PWM output 2A |
| Chân 69 | RB4/KBI0 — Port B I/O / Keyboard interrupt 0 |
| Chân 70 | RB5/KBI1 — Port B I/O / Keyboard interrupt 1 |
| Chân 71 | RB6/KBI2/PGC — Port B I/O / Keyboard interrupt 2 / ICSP clock |
| Chân 72 | RB7/KBI3/PGD — Port B I/O / Keyboard interrupt 3 / ICSP data |
| Chân 73 | MCLR/RE3 — Master clear (reset) input |
| Chân 74 | RJ0 — Port J I/O bit 0 |
| Chân 75 | RJ1 — Port J I/O bit 1 |
| Chân 76 | RJ2 — Port J I/O bit 2 |
| Chân 77 | RJ3 — Port J I/O bit 3 |
| Chân 78 | RJ4 — Port J I/O bit 4 |
| Chân 79 | RJ5 — Port J I/O bit 5 |
| Chân 80 | RJ6 — Port J I/O bit 6 |
Ứng dụng tiêu biểu
PIC18F86J11-I/PT phù hợp cho 6 Áp dụngs: Industrial Control and HMI Panels, Automotive Body and Comfort Modules, USB Connectivity Bridges and Sensor Aggregators, Consumer Appliance Main Controllers, Embedded Display and Keypad Controllers, Test and Measurement Front-End Controllers.
Industrial Control and HMI Panels
The PIC18F86J11-I/PT is well suited to industrial control panels and human-machine interface (HMI) front-ends because it combines 64 KB of Flash for protocol stacks and graphics state machines with 80-pin TQFP package offering ample I/O for keypads, character or graphic LCDs, and indicator LEDs. Its 12 MIPS performance at 48 MHz handles polling of multiple input channels while executing Modbus RTU or proprietary serial protocols over the two integrated USARTs. The nanoWatt sleep modes allow duty-cycled battery-backed operation in remote panels, and the -40 C to +85 C industrial temperature range tolerates factory-floor thermal stress. Estimated active current draw of 15-20 mA at 48 MHz and 3.3 V is acceptable when paired with a low-dropout regulator and bulk decoupling.
Được đề xuất
Automotive Body and Comfort Modules
With Microchip's recommendation for automotive design and special AEC-Q100 ordering codes, the PIC18F86J11-I/PT family is a credible candidate for body control modules (BCMs), lighting controllers, and HVAC user interfaces. The 20-bit program counter supports in-field firmware upgrades via the LIN or CAN-capable USARTs, while the 10-bit ADC with up to 16 channels reads analog sensor inputs such as temperature, light, and position. The wide operating voltage of 2.0 V to 3.6 V tolerates automotive cranking transients when paired with proper TVS protection. Estimated: design must include reverse-battery and load-dump protection at VDD, as the MCU has no internal automotive transient suppression.
Được đề xuất
USB Connectivity Bridges and Sensor Aggregators
Although the PIC18F86J11-I/PT lacks native USB, it can serve as a sensor-aggregation bridge that streams data over USB CDC class through an external UART-to-USB converter such as the MCP2200 or MCP2221. The 64 KB Flash accommodates USB command parsers and HID report descriptors, while 3.9 KB of SRAM holds transaction buffers. Two SPI ports allow simultaneous connection of an SD card and a sensor front-end, with the MCU's DMA-free interrupt-driven architecture keeping latency predictable at 12 MIPS. The 80-pin TQFP package supports parallel LCD or OLED panels for status displays, making the design suitable for handheld instruments or factory-floor diagnostic tools.
Được đề xuất
Consumer Appliance Main Controllers
The PIC18F86J11-I/PT's 64 KB Flash and 3.9 KB SRAM comfortably fit appliance firmware for washing machines, dishwashers, induction cookers, and microwave ovens. Its 12 MIPS at 48 MHz is sufficient for motor control loops using timer interrupts and PWM, while the 10-bit ADC reads multiple temperature sensors and water-level probes simultaneously. The industrial -40 C to +85 C range covers under-cabinet and engine-adjacent enclosures, and the 80-TQFP package exposes I/O for inverter bridge control signals and seven-segment or TFT status displays. Estimated: at full peripheral load and 48 MHz, total system current is around 30-40 mA, easily managed by a small buck regulator.
Được đề xuất
Embedded Display and Keypad Controllers
With up to 70 I/O pins on the 80-pin TQFP package, the PIC18F86J11-I/PT can directly drive character LCDs, small graphical OLED panels, and 8x8 or larger keypads without external logic. The hardware 8x8 multiplier accelerates button-debounce and menu navigation code, and the dual USARTs allow simultaneous debugging via UART and field-upgrade communication. Power consumption scales with clock and peripheral activity, with idle mode dropping current to single-digit milliamps when the display refresh timer is the only active peripheral. According to the Microchip datasheet, the integrated 8 MHz internal oscillator option simplifies designs where external crystals are undesirable.
Được đề xuất
Test and Measurement Front-End Controllers
Bench-top test instruments benefit from the PIC18F86J11-I/PT's combination of two USARTs (one for command interface, one for data streaming) plus two SPI ports for ADC, DAC, and digital potentiometer control. The 10-bit, 16-channel ADC provides adequate resolution for general-purpose voltage and current monitoring, while the 12 MIPS core executes calibration math and UART formatting in real time. The 64 KB Flash supports USB CDC command libraries, SCPI parsers, or vendor-proprietary protocols. The 80-pin TQFP's grounding scheme and exposed thermal pad assist EMI-sensitive analog measurements when combined with proper PCB partitioning.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PIC18F86J11-I/PT — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PIC18F86J10-I/PT | PIC18F87J11-I/PT | PIC18F85J11-I/PT | PIC18F86J16-I/PT | PIC18F85K90-E/PT | PIC18F85J90-I/PT |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 80-pin TQFP (PT) | 80-pin TQFP (PT) - same | 80-pin TQFP (PT) - same | 64-pin TQFP (PT) - smaller footprint | 80-pin TQFP (PT) - same | 80-pin TQFP (PT) - same | 80-pin TQFP (PT) - same |
| Program Memory (Flash) | 64 KB | 64 KB | 128 KB | 64 KB | 96 KB | 32 KB | 32 KB |
| Data RAM | 3.9 KB | 3.9 KB | 3.9 KB | 3.9 KB | 3.9 KB | 2 KB | 2 KB |
| Maximum Frequency | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 64 MHz | 48 MHz |
| Core Architecture | PIC18 8-bit | PIC18 8-bit | PIC18 8-bit | PIC18 8-bit | PIC18 8-bit | PIC18 8-bit (K-series, eXtreme Low Power) | PIC18 8-bit |
| Supply Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 1.8 V to 5.5 V | 2.0 V to 3.6 V |
| Operating Temperature | -40 C to +85 C (Industrial) | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +125 C (Extended) | -40 C to +85 C |
Bảo phân biệt quan trọng
- Silicon enhancement upgrade path within same 80-TQFP footprint (vsPIC18F86J10-I/PT)
- Doubled Flash headroom in same package (vsPIC18F87J11-I/PT)
- Wider supply voltage tolerance for battery applications (vsPIC18F85K90-E/PT)
Ghi chú thiết kế
Place one 100 nF X7R ceramic bypass capacitor as close as possible to every VDD/VSS pair (pins 10/9, 32/31, 58/57), plus one 10 uF bulk capacitor on the main VDD rail. AVDD/AVSS at pins 11/12 should have their own 100 nF and 10 uF caps to isolate analog supply noise from the digital core. Use a dedicated LDO such as MCP1700-3302E for the analog rail to keep ADC readings clean at 10-bit resolution.
The 80-pin TQFP (12x12 mm) requires a 4-layer PCB minimum for clean impedance control of the 48 MHz oscillator traces. Keep crystal traces (OSC1/OSC2) as short as possible (under 10 mm) and surrounded by a ground guard ring. Separate analog and digital ground planes with a single connection point near the AVSS pin to avoid ground-loop noise coupling into the ADC.
Do not exceed the absolute maximum VDD of 4.0 V; the PIC18F86J11-I/PT is a 3.3 V part and lacks 5 V tolerance on I/O. The MCLR/RE3 pin (pin 73) requires a 10 kohm pull-up to VDD for normal operation and a 100 nF capacitor for decoupling; an ICSP programmer must be able to drive MCLR low for programming. Flash endurance is rated at 1k erase/write cycles minimum, so use EEPROM emulation or external SPI Flash for high-write-count data logging applications.
When using the Parallel Master Port (PMP) or Parallel Slave Port (PSP) on ports D/H/J, route the parallel data bus with matched trace lengths (delta under 5 mm) and a 33 ohm series damping resistor on each output to suppress overshoot on the 80 TQFP pin fan-out. The two USARTs support LIN by default; add a 1 kohm pull-up on the LIN bus per the LIN specification if used in an automotive network.
Thông tin tuân thủ
Standard -I/PT part is industrial grade (-40 C to +85 C). For AEC-Q100 automotive qualification, special ordering codes are required per Microchip product page; standard -I/PT is not AEC-Q100 qualified.