EP1M120F484I6M vs EP1M120F484C8N 比較
詳細並排比較 EP1M120F484I6M 由 Altera 與 EP1M120F484C8N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1M120F484I6M | EP1M120F484C8N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Mercury (EP1M) | Mercury (EP1M) |
| Logic Elements | 120,000 | — |
| System Gates | 480,000 (typical) | — |
| LABs / CLBs | 303 | — |
| Flip-Flops | 49,152 | — |
| Embedded Memory (Bits) | 4,800 Kb (480 Kbits) | — |
| Package Type | 484-Ball FCBGA | FINE LINE BGA-484 |
| Package Code | BGA, 484 balls, Fine-pitch | — |
| Package Shape | Square | — |
| Terminal Form | Ball | — |
| Temperature Grade | Industrial | — |
| Speed Grade | -6 (slowest Mercury timing bin) | 8 |
| 供應電壓 | 1.5 V core / 3.3 V aux (per Mercury datasheet) | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS | — |
| Clock Management | PLLs (per Mercury family) | — |
| Boundary-Scan | IEEE 1149.1 / JTAG | — |
| RoHS 狀態 | Compliant (M revision) | [DATA_NEEDED: RoHS compliance] |
| Logic Family | — | CMOS, SRAM-based |
| Number of Logic Elements | — | 49,152 |
| Embedded Memory | — | 4,800 Kbits (M4K blocks) |
| User I/O Pins | — | 303 |
| Terminal Pitch | — | 1.000 mm |
| 安裝類型 | — | Surface Mount |
| Supply Voltage (Core) | — | 1.8 V nominal (1.71 V min, 1.89 V max) |
| 工作溫度 | — | 0 °C to 85 °C (Commercial) |
| Transceivers | — | Up to 8 channels with CDR up to 1.25 Gbps |
| Configuration | — | SRAM, JTAG via Quartus II |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |