EP1S20B672C7N vs EP1S25F672C7N 比較
詳細並排比較 EP1S20B672C7N 由 Intel 與 EP1S25F672C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S20B672C7N | EP1S25F672C7N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | Stratix | — |
| Family | Stratix (original) | — |
| Process Technology | 0.13 µm CMOS | 0.13 µm CMOS |
| Logic Elements (LEs) | 18,460 | 25,660 |
| LABs / CLBs | 1,846 | — |
| Embedded Memory Bits | 1,669,248 bits | 1,944,576 |
| Maximum User I/O | 426 | 473 |
| Number of Pins / Balls | 672 | — |
| Package Type | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) | — |
| Supply Voltage (Core, VCCINT) | 1.5 V | — |
| 工作溫度 | 0 °C to 85 °C (Commercial Extended) | 0 °C to 85 °C (commercial) |
| Speed Grade | -7 | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| Logic Family | CMOS | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm from product page] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | Stratix |
| Logic Array Blocks (LABs) | — | 2,566 |
| Number of I/O Pins | — | 672 (BGA balls) |
| 封裝 | — | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |