EP20K400GC655-2V vs EP20K400GI655-2 比較

詳細並排比較 EP20K400GC655-2V 由 Altera 與 EP20K400GI655-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K400GC655-2V EP20K400GC655-2V - 400K Gate APEX-20KC FPGA 655-CPGA | Altera

EP20K400GC655-2V - 400K Gate APEX-20KC FPGA 655-CPGA | Altera

EP20K400GC655-2V ⚠ 最後購買機會

規格比較

參數 EP20K400GC655-2V EP20K400GI655-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Series APEX-20KC APEX 20K (EP20K400)
Family APEX 20KC (1.8 V, LVDS) —
Logic Elements 16,640 —
Total RAM Bits 212,992 —
System Gates ~400,000 (typical marketing figure) —
Number of I/O [DATA_NEEDED: I/O count] —
Core Voltage (VCCINT) 2.375 V to 2.625 V (nominal 2.5 V) —
Propagation Delay 3.000 ns 3.1 ns (typical)
Process Technology CMOS, 0.18 um —
LVDS Support Yes —
封裝 655-CPGA (62.48 x 62.48 mm) SPGA-655 (47 mm x 47 mm)
Package Type Ceramic Pin Grid Array, through-hole —
安裝類型 Through-hole (CPGA) Through-Hole / Socket
Speed Grade -2 —
工作溫度 [DATA_NEEDED: temperature grade] -40C to +85C (industrial)
RoHS 狀態 unknown [DATA_NEEDED: RoHS status]
Lead-Free unknown —
Architecture MultiCore (LUT + product-term + embedded memory) —
Manufacturer — Altera Corporation
Device Type — Field Programmable Gate Array (FPGA)
Typical Gate Count — 400,000 gates
Logic Elements (LE) — 16,640
Maximum User I/O — 496
Dedicated Inputs — 6
Number of Terminals — 655
Nominal Supply Voltage — 2.5 V
Supply Voltage Range — 2.375 V to 2.625 V
Technology — CMOS SRAM
Moisture Sensitivity Level — 1 (per Altera family)
Configuration Method — JTAG, Passive Serial, Passive Parallel
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+
Embedded Memory — Embedded System Blocks (ESBs)
生命週期狀態 — Obsolete (legacy Altera APEX 20K family)

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