EP20K400GC655-3V vs EP20K400GC655-3X 比較
詳細並排比較 EP20K400GC655-3V 由 Intel 與 EP20K400GC655-3X 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400GC655-3V | EP20K400GC655-3X |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX-20KC | APEX-20KC |
| Family | APEX 20KC (Apex 20KE Device Family, 1.8 V, LVDS) | APEX 20K (MultiCore architecture, LUT + product-term + embedded memory) |
| Manufacturer | Altera (now Intel) | Altera (now Intel FPGA) |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Logic Elements | 16640 | — |
| Total RAM Bits | 212992 | 212,992 bits |
| Typical Gate Count | 400000 | — |
| Number of User I/O | 496 | — |
| 最大時脈頻率 | 714.2 MHz | — |
| Propagation Delay | 3.6 ns | — |
| Speed Grade | -3V (commercial temperature, Vcc 1.8 V) | -3 (fastest) |
| 封裝 | 655-BCPGA (62.48 mm x 62.48 mm) | — |
| Package Equivalence Code | SPGA655, 47x47 | — |
| 安裝類型 | Through Hole (CPGA) | Through-Hole (CPGA, ceramic) |
| Peak Reflow Temperature | 220 C | — |
| Process Technology | CMOS | 0.22 µm CMOS |
| Configuration | SRAM-based (requires EPC configuration device) | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance flag - BCPGA package often non-RoHS] | [DATA_NEEDED: RoHS status - ceramic CPGA historically non-RoHS] |
| 工作溫度 | [DATA_NEEDED: commercial / industrial / military grade] | [DATA_NEEDED: operating temperature range] |
| Logic Elements / Cells | — | 16,640 |
| System Gates | — | 400,000 |
| Maximum Internal Frequency | — | 167 MHz (speed grade -3) |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V (LVDS support per APEX 20KE datasheet) |
| 封裝 / 外殼 | — | 655-BCPGA (CPGA655, 62.48 x 62.48 mm) |
| Suffix Code | — | -X (extended / ceramic CPGA variant) |
| I/O Count | — | [DATA_NEEDED: max user I/O] |
| JTAG / Boundary Scan | — | IEEE 1149.1 (per APEX 20K family) |