EP20K600CF33C8 vs EP20K600CF33C9 比較

詳細並排比較 EP20K600CF33C8 由 Altera 與 EP20K600CF33C9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF33C8 EP20K600CF33C9
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family APEX 20KC APEX 20KC
Device Type FPGA (Field Programmable Gate Array) —
Typical Gates 600,000 —
Logic Elements 24,320 —
Embedded RAM Bits 311,296 —
Embedded System Blocks (ESB) 152 —
Maximum User I/O 488 —
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Core Voltage (VCCINT) 1.8 V —
I/O Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V (bank-selectable) —
LVDS Support Yes, up to 840 Mbps —
PLLs 4 enhanced PLLs —
封裝 1020-ball FineLine BGA (FC-FBGA), 33 x 33 mm 1020-ball FC-FBGA
Speed Grade -8 —
工作溫度 Commercial (0 °C to +85 °C) —
Configuration Modes Passive Serial, Passive Parallel Asynchronous, Passive Parallel Synchronous, JTAG —
RoHS 狀態 Compliant (lead-free version) / non-compliant for legacy C-speed grade variant [DATA_NEEDED: rohs status]
Status NRND / Last-Time-Buy (per Altera/Intel product notice) —
System Gates — 600,000 (maximum)
Logic Elements / Cells — 24,320
Maximum Operating Frequency — 250 MHz
最大時脈頻率 — 303.03 MHz
Propagation Delay — 2.0 ns
Core Supply Voltage (VCCINT) — 1.8 V nominal (1.71 V to 1.89 V)
User I/O — 588 (4 dedicated inputs + 580 general-purpose I/O)
安裝類型 — Surface Mount (BGA)
工作溫度範圍 — [DATA_NEEDED: operating temperature range]
Embedded RAM — Dual-port RAM blocks (per family)
Programmability — JTAG / IEEE 1149.1 ISP, SRAM-based
MSL 等級 — [DATA_NEEDED: MSL level]
Logic Block Architecture — MultiCore (LUT + product-term + embedded memory)
I/O Standards Supported — LVTTL, LVCMOS, LVDS (per family datasheet)

資料表與資源

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