EP20K600CF672I8N vs EP20K600CF672C8N 比較

詳細並排比較 EP20K600CF672I8N 由 Intel 與 EP20K600CF672C8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF672I8N EP20K600CF672C8N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 啟用中
Device Family APEX 20KC —
Device Type SPLD / PLD (FPGA-class) SPLD
System Gates 600K —
Logic Elements / Cells 24,320 —
Maximum User I/O (digchip) 488 —
Maximum User I/O (Altera) 508 —
Total Package Pins 672 —
Package Type FC-FBGA (Fine-pitch Chip-Scale BGA), 45 x 45 mm, 1.27 mm pitch —
Internal Performance 301.21 MHz —
Propagation Delay 1.48 ns 1.48 ns
Core Supply Voltage 1.8 V —
Process Technology 0.15-um all-layer copper-metal —
工作溫度 0C to 85C (Industrial) 0°C to 85°C
Pin-Compatible With APEX 20KE family —
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] unknown
Product Type — FPGA / programmable logic device
Family — APEX 20KC
Nominal Gate Capacity — 600K gates
Logic Elements or Cells — 24,320
Macros — 2,432
User I/O Count — 508
Package Terminals — 652 pins
封裝 — BGA-652, 45 x 45 mm, 1.27 mm pitch
Package Description — 672-pin FC-FBGA
供應電壓 — 1.8 V
Listed Frequency — 301.21 MHz
Fabrication Process — 0.15 µm
Interconnect Metal — All-layer copper metal
I/O Configuration — 508 user I/O
安裝類型 — Surface mount
REACH Status — unknown
AEC-Q100 Qualification — unknown
Configuration Method — [DATA_NEEDED: configuration memory and programming method]
Core Current — [DATA_NEEDED: core supply current]
I/O Bank Voltage — [DATA_NEEDED: supported I/O voltage range]
Junction Temperature — [DATA_NEEDED: maximum junction temperature]
熱阻 — [DATA_NEEDED: junction-to-ambient thermal resistance]

資料表與資源

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