EP2A25F672C7 vs EP2A25F672I-9 比較

詳細並排比較 EP2A25F672C7 由 Altera 與 EP2A25F672I-9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A25F672C7 EP2A25F672I-9
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Product Family APEX II —
Logic Elements 25,000 —
Maximum System Gates 1,650,000 [DATA_NEEDED: maximum system gates]
Maximum RAM Bits 422,976 —
User I/O Count 492 —
封裝 672-ball FCBGA (FineLine BGA) 672-pin FCBGA (FineLine BGA)
Process Technology 0.15-um all-layer copper, up to 8 metal layers 0.18 µm CMOS
Supply Voltage (Core) 1.5 V —
LVDS Data Rate 1 Gbps per channel (True-LVDS) —
I/O Standards Supported LVDS, LVPECL, PCML, HyperTransport —
工作溫度 0C to +85C (Commercial) —
Speed Grade -7 -9
Configuration Mode Passive Serial, Passive Parallel, JTAG —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Embedded System Blocks (ESB) Yes - RAM, ROM, CAM, multiplier support —
Family — APEX II
Logic Elements (typical) — 25,000
Embedded System Blocks (ESB) Memory — 1,125 Kbits
Maximum User I/O Pins — [DATA_NEEDED: maximum user I/O pins]
Number of PLLs — 4
Core Voltage — 1.5 V / 1.8 V (speed-grade dependent)
Operating Temperature Grade — Industrial (-40 °C to +100 °C junction)
安裝類型 — Surface Mount (BGA)
濕度敏感等級 (MSL) — 3 (per Vyrian listing)
Peak Reflow Temperature — 220 °C (per Vyrian listing)
Configuration Method — JTAG / serial configuration EPROM
Supported I/O Standards — LVTTL, LVCMOS, LVDS, PCI
Legacy Status — Obsolete - consult Altera / Intel FPGA archive for documentation

資料表與資源

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