EP2A40F672C6 vs EP2A40F672C6N 比較

詳細並排比較 EP2A40F672C6 由 Altera 與 EP2A40F672C6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A40F672C6 EP2A40F672C6N
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX II APEX II
Device EP2A40 —
Logic Elements (typical) 40,000 —
Maximum System Gates [DATA_NEEDED: maximum system gates] 1,125,000
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] 160
Maximum User I/O Pins [DATA_NEEDED: max user I/O count] [DATA_NEEDED: maximum user I/O count]
封裝 672-ball FineLine BGA (FBGA-672) 672-ball FineLine BGA
Speed Grade C6 (commercial) C6 (per part number suffix)
工作溫度 Commercial (0C to +85C) Commercial (0C to +85C)
Process Technology 0.18-micron CMOS SRAM-based, 0.18 um (per family datasheet)
Configuration Memory SRAM-based —
JTAG Support Yes (IEEE 1149.1) —
PLL Support Yes —
安裝類型 Surface Mount (BGA) Surface Mount
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Lead-Free [DATA_NEEDED: lead-free status] —
Lifecycle Obsolete / EOL (per Intel/Altera product discontinuation notice) —
Logic Elements — 40,000
Embedded RAM Bits — 442,368
Core Voltage — 1.5 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V
Configuration Methods — Passive Serial, Passive Parallel, JTAG
PLL Count — [DATA_NEEDED: PLL count]

資料表與資源

瀏覽所有產品 建立 BOM 索取報價