EP2A40F672C8 vs EP2A40F672C7 比較
詳細並排比較 EP2A40F672C8 由 Intel 與 EP2A40F672C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A40F672C8 | EP2A40F672C7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Family | CMOS | — |
| Typical Logic Elements (LEs) | 40,000 | — |
| Embedded Memory | Up to 1.5 Mbits | — |
| User I/Os | 492 pins | — |
| 腳位數 | 672 | — |
| Package Type | FineLine BGA, 27 x 27 mm, 1.0 mm pitch | — |
| Process Technology | 0.15-micron all-layer copper, up to 8 metal layers | 0.15 µm CMOS, all-layer copper, up to 8 metal layers |
| Propagation Delay (speed grade C8) | 1.55 ns | — |
| 工作溫度 | 0 C to 85 C (commercial) | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| LVDS Signaling Support | Up to 1 Gbps | — |
| Multipliers | Embedded multiplier blocks | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| Logic Elements | — | 38,400 |
| System Gates | — | 1,500,000 |
| Macro Cells | — | 2,560 |
| Maximum User I/O | — | 492 |
| Core Voltage | — | 1.5 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Pin-to-Pin Delay | — | 1.55 ns (C7 speed grade) |
| Maximum Internal Frequency | — | 562 MHz |
| High-Speed Interface | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| PLLs | — | 4 |
| 封裝 | — | 672-ball FC-FBGA (FineLine BGA) |
| Package Dimensions | — | 27 x 27 mm, 1.0 mm pitch |
| Operating Temperature Grade | — | Commercial (per 'C' suffix in speed grade) |
| RoHS 狀態 | — | Compliant |
| Lead-Free | — | Yes |